MAS 35x9F
DATA SHEET
3.4.3. Codec Registers
2
Table 3–16: Codec control registers on I C subaddress 6C
hex
Register
Address
(hex)
Function
Name
CONVERTER CONFIGURATION
00 00
Audio Codec Configuration
CONV_CONF
0 dB is related to the D/A full-scale output voltage
Please refer to (see Section 4.6.3. on page 81).
bit[15:12]
bit[11:8]
A/D converter left amplifier gain = n*1.5−3 [dB]
A/D converter right amplifier gain = n*1.5−3 [dB]
1111
1110
...
+19.5 dB
+18.0 dB
...
0011
0010
0001
0000
+1.5 dB
0.0 dB
−1.5 dB
− 3.0 dB
bit[7:4]
bit[3]
Microphone amplifier gain = n*1.5+21 [dB]
1111
1110
...
+43.5 dB
+42.0 dB
...
0001
0000
+22.5 dB
+21.0 dB
Input selection for left A/D converter channel
0
1
line-in
microphone
1)
bit[2]
bit[1]
bit[0]
Enable left A/D converter
1)
Enable right A/D converter
1)
Enable D/A converter
1)
The generation of the internal DC reference voltage for the D/A converter is also controlled with this bit. In order
to avoid click noise, the reference voltage at pin AGNDC should have reached a near ground potential before
repowering the D/A converter after a short down phase.
Alternatively, at least one of the A/D converters (bits[2] or [1]) should remain set during short power-down phases
of the D/A. Then the DC reference voltage generation for the D/A converter will not be interrupted.
46
June 30, 2004; 6251-505-1DS
Micronas
MICRONAS [ MICRONAS ]
