DATA SHEET
MAS 35x9F
4.6. Electrical Characteristics
Abbreviations:
tbd = to be defined
vacant = not applicable
positive current values mean current flowing into the chip
4.6.1. Absolute Maximum Ratings
Stresses beyond those listed in the “Absolute Maximum Ratings” may cause permanent damage to the device. This
is a stress rating only. Functional operation of the device at these conditions is not implied. Exposure to absolute
maximum rating conditions for extended periods will affect device reliability.
This device contains circuitry to protect the inputs and outputs against damage due to high static voltages or electric
fields; however, it is advised that normal precautions be taken to avoid application of any voltage higher than abso-
lute maximum-rated voltages to this high-impedance circuit.
All voltages listed are referenced to ground (V
V
V
= 0 V) except where noted.
SUP1, SUP2, SUP3
All GND pins must be connected to a low-resistive ground plane close to the IC.
Do not insert the device into a live socket. Instead, apply power by switching on the external power supply. For
power up/down sequences, see the instructions in Section 2.6. of this document.
Table 4–1: Absolute Maximum Ratings
Symbol
Parameter
Pin Name
Limit Values
Unit
Min.
Max.
1)
2)
T
Ambient Temperature
°C
A
- operating conditions
- extended temperature range
−10
−40
85
85
1)
T
Case Temperature
PLQFP64-1
PMQFP64-2
PQFN64-1
°C
C
−10
−10
−10
115
120
120
T
Storage Temperature
−40
125
°C
S
3)
P
V
Maximum Power Dissipation
PLQFP64-1
PMQFP64-2
VDD, XVDD,
AVDD0/1,
I2CVDD
W
MAX
0.67
0.63
0.87
PQFN64-1
Supply Voltage 1
VDD, XVDD,
I2CVDD,
−0.3
6
V
SUP1
4)
AVDD0/1
1)
2)
Data sheet parameters are valid for “operating conditions” only. The functionality of the device in the “extended
temperature range” was checked by electrical characterization on sample base.
A power-optimized board layout is recommended. The Case Temperature mentioned in the “Absolute Maxi-
mum Ratings” must not be exceeded at worst case conditions of the application.
3)
4)
Package limits
Both AVDD0 and AVDD1 have to be connected together!
Micronas
June 30, 2004; 6251-505-1DS
65