DATA SHEET
MAS 35x9F
2
Table 3–16: Codec control registers on I C subaddress 6C , continued
hex
Register
Address
(hex)
Function
Name
INPUT MODE SELECT
00 08 Input Mode Setting
ADC_IN_MODE
bit[15]
Mono switch
0
1
stereo input mode
left channel is copied into the right channel
bit[14:2]
bit[1:0]
Reserved, must be set to 0
Deemphasis select
0
1
2
deemphasis off
deemphasis 50 µs
deemphasis 75 µs
OUTPUT MODE SELECT
D/A Converter Source Mixer
MIX ADC scale
MIX DSP scale
bit[15:8] Linear scaling factor (hex)
00 06
00 07
DAC_IN_ADC
DAC_IN_DSP
0
off
20
40
7f
50 % (−6 dB gain)
100 % (0 dB gain)
200 % (+6 dB gain)
In the sum of both mixing inputs exceeds 100 %, clipping may occur in the
successive audio processing.
00 0E
D/A Converter Output Mode
DAC_OUT_MODE
bit[15]
bit[14]
bit[1:0]
Mono switch
0
1
stereo through
mono matrix applied
Invert right channel
0
1
through
right channel is inverted
Reserved, must be set to 0
In order to achieve more output power a single loudspeaker can be connected
as a bridge between pins OUTL and OUTR. In this mode bit[15] and bit[14]
must be set.
Micronas
June 30, 2004; 6251-505-1DS
47
MICRONAS [ MICRONAS ]
