MAS 35x9F
DATA SHEET
2.10.2.Setup
2.11.Default Operation
Table 3–10 on page 39 lists the new bits, UIC cells,
and registers to setup the MP3 block input mode.
This sections refers to the standard operation mode
“power-optimized solution” (see Section 2.6.3.).
2.10.2.1.Resync Timeout
2.11.1. Stand-by Functions
In case the MP3 decoder loses the synchronization
(e.g. due to corrupted input data), the output is softly
muted and a resync loop is entered where the
MAS 35x9F can be accessed via I C. The loop is left
and the re-synchronization procedure continues in any
of the following cases:
After applying the battery voltage, the system will
remain stand-by, as long as the DCEN pin level is kept
low. Due to the low stand-by current of CMOS circuits,
the battery may remain connected to DCSOn/VSENSn
at all times.
2
– the last input data block is fully sent,
2.11.2.Power-Up of the DC/DC Converters
and Reset
– the Validate bit of IOControlMain is set
(D0:346, bit[0]),
The battery voltage must be applied to pin DCSOn via
the 22 µH inductor and, furthermore, to the sense pin
VSENSn via a Schottky diode (see Fig. 2–7 on
page 13).
– the timeout is reached (ResyncTimeout in
Table 3–10), the end bit is set (this bit will be reset
by the MAS 35x9F).
For start-up, the pin DCEN must be connected via an
external “start” push button to the I2CVDD supply,
which is equivalent to the battery supply voltage
(> 0.9 V) at start-up.
2.10.2.2.Detailed Setup
After the MPEG audio decoder application has been
selected, the following settings enable the MP3 block
decoding process.
The supply at DCEN must be applied until the DC/DC
converters have started up (signal at pin PUP) and
then removed for normal operation.
Play MP3
1. Write 0x318 into SerialInConfig.
2. Write IOControlMain with bit[2] and bit[0] equal one.
As soon as the output voltage at VSENSn reaches the
default voltage monitor reset level of 3.0 V, the respec-
tive internal PUPn bit will be set. When both PUPn bits
are set, the signal at pin PUP will go high and can be
used to start and reset the microcontroller.
3. Write IOControlMain with bit[2] equals zero and
bit[0] equals one.
4. Write 0x0 into ResyncTimeout.
2
Before transmitting any I C commands, the controller
5. Write 0x0 into SoftMute.
must issue a power-on reset to pin POR. The separate
supply pin I2CVDD ensures that the I C interface
works independently from the DSP or the audio codec.
Now the desired supply voltage can be programmed at
2
6. Enable EODQ interrupt for sending data in controller.
7. Set StartBit in MP3BlockConfig.
2
8. Send data block of 2048 byte when EODQ goes
high.
I C subaddress 76
.
hex
Stop/Pause MP3
1. Write 0x1 into SoftMute.
2. Clear start bit in MP3BlockConfig.
18
June 30, 2004; 6251-505-1DS
Micronas
MICRONAS [ MICRONAS ]
