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HAL855UT-A 参数 Datasheet PDF下载

HAL855UT-A图片预览
型号: HAL855UT-A
PDF下载: 下载PDF文件 查看货源
内容描述: 可编程线性霍尔效应传感器与任意输出特性 [Programmable Linear Hall-Effect Sensor with Arbitrary Output Characteristic]
分类和应用: 传感器
文件页数/大小: 42 页 / 2158 K
品牌: MICRONAS [ MICRONAS ]
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HAL855  
DATA SHEET  
Mode  
Output Format  
The MODE register consists of four “sub”-registers  
defining the magnetic and output behavior of the sen-  
sor. The RANGE bits are the three lowest bits of the  
MODE register; they define the magnetic field range of  
the A/D converter. The next three bits (FILTER) define  
the 3 dB frequency of the digital low pass filter. The  
next sub-register is the FORMAT register, and it  
defines the different output formats as described  
below. This sub-register also consists of 3 bits. The  
last three MSBs define the OUTPUT PERIOD of the  
PWM signal.  
The HAL855 provides two different output formats: a  
PWM and Biphase-M output.  
PMW output is a pulse width modulated output. The  
signal is defined by the ratio of pulse width to pulse  
period.  
The Biphase-M output is a serial protocol. A logical “0”  
is coded as no output level change within the bit time.  
A logical “1” is coded as an output level change  
between 50% and 80% of the bit time. After each bit,  
an output level change occurs (see Section 3.6.1. on  
page 24).  
Range  
Table 2–3: OUTPUT FORMAT register definition  
Table 2–1: RANGE register definition  
Output Format  
PWM  
Bit Setting  
Magnetic Field Range  
30 mT...30 mT  
40 mT...40 mT  
60 mT...60 mT  
75 mT...75 mT  
80 mT...80 mT  
90 mT...90 mT  
100 mT...100 mT  
150 mT...150 mT  
Bit Setting  
2
0
4
5
1
6
2
7
3
Biphase-M  
41)  
52)  
Biphase-M (test)  
1)  
In case of OUTPUT FORMAT = 4 the continuous  
Biphase-M output will be active after locking the  
device. In order to test the Biphase-M output with  
non-locked sensors OUTPUT FORMAT = 5 has  
to be used.  
writing OUTPUT FORMAT = 5 will activate the  
Biphase-M output for test purpose. The test can  
be deactivated by switching the device off.  
2)  
Output Period  
Filter  
Table 2–2: FILTER register definition  
The OUTPUT PERIOD register defines the PWM  
period of the output signal.  
Table 2–4: OUTPUT PERIOD register definition  
3 dB Frequency  
80 Hz  
Bit Setting  
0
1
2
3
4
PWM Output Period  
128 ms; 12-bit resolution  
64 ms; 12-bit resolution  
32 ms; 12-bit resolution  
16 ms; 12-bit resolution  
8 ms; 12-bit resolution  
4 ms; 11-bit resolution  
2 ms; 10-bit resolution  
1 ms; 9-bit resolution  
Bit Setting  
160 Hz  
0
1
2
3
4
5
6
7
500 Hz  
1 kHz  
2 kHz  
10  
Nov. 26, 2008; DSH000149_003EN  
Micronas