PRELIMINARY DATA SHEET
HAL805
5.3. Telegram Codes
Sync Bit
Data Bits (DAT)
The 14 Data Bits contain the register information.
The registers use different number formats for the
Data Bits. These formats are explained in Section 5.4.
Each telegram starts with the Sync Bit. This logical “0”
pulse defines the exact timing for tp0.
In the Write command, the last bits are valid. If, for
example, the TC register (6 bits) is written, only the
last 6 bits are valid.
Command Bits (COM)
The Command code contains 3 bits and is a binary
number. Table 5–2 shows the available commands
and the corresponding codes for the HAL 805.
In the Read command, the first bits are valid. If, for
example, the TC register (6 bits) is read, only the first 6
bits are valid.
Command Parity Bit (CP)
Data Parity Bit (DP)
This parity bit is “1” if the number of zeros within the 3
Command Bits is uneven. The parity bit is “0”, if the
number of zeros is even.
This parity bit is “1” if the number of zeros within the
binary number is even. The parity bit is “0” if the num-
ber of zeros is uneven.
Address Bits (ADR)
Acknowledge
The Address code contains 4 bits and is a binary num-
ber. Table 5–3 shows the available addresses for the
HAL 805 registers.
After each telegram, the output answers with the
Acknowledge signal. This logical “0” pulse defines the
exact timing for tpOUT
.
Address Parity Bit (AP)
This parity bit is “1” if the number of zeros within the 4
Address bits is uneven. The parity bit is “0” if the num-
ber of zeros is even.
Table 5–2: Available commands
Command
READ
Code
Explanation
read a register
write a register
2
3
4
5
6
7
WRITE
PROM
program all nonvolatile registers (except the lock bits)
erase all nonvolatile registers (except the lock bits)
lock MICRONAS lockable register
ERASE
LOCKI
LOCK
lock the whole device and switch permanently to the analog-mode
Please note:
The MICRONAS lock bit (LOCKI) has already been set during production and cannot be reset.
Micronas
21
MICRONAS [ MICRONAS ]
