ADC-READOUT Register
14 bit
Digital
Output
Digital Signal Processing
A/D
Converter
Digital
Filter
Multiplier
Adder
Limiter
D/A
Converter
TC
6 bit
TCSQ
5 bit
MODE Register
RANGE FILTER
2 bit
1 bit
SENSI-
TIVITY
14 bit
VOQ
11 bit
CLAMP-
LOW
10 bit
CLAMP-
HIGH
11 bit
LOCK
1 bit
Micronas
Registers
EEPROM Memory
Lock
Control
Fig. 2–3:
Details of EEPROM and Digital Signal Processing
V
5
Range = 30 mT
V
5
Clamp-high = 4.5 V
Range = 150 mT
V
OUT
4
Clamp-high = 4 V
V
OUT
4
3
Sensitivity = 0.15
3
Sensitivity = –0.45
V
OQ
= 2.5 V
2
2
V
OQ
= –0.5 V
1
Clamp-low = 1 V
1
Clamp-low = 0.5 V
0
–40
–20
0
20
B
40 mT
0
–150 –100 –50
0
50
B
100
150 mT
Fig. 2–4:
Example for output characteristics
Fig. 2–5:
Example for output characteristics
6
Micronas
MICRONAS [ MICRONAS ]
