HAL300
2. Functional Description
This Hall effect sensor is a monolithic integrated circuit
with 2 Hall plates 2.05 mm apart that switches in re-
sponse to differential magnetic fields. If magnetic fields
with flux lines perpendicular to the sensitive areas are
applied to the sensor, the biased Hall plates force Hall
voltages proportional to these fields. The difference of
the Hall voltages is compared with the actual threshold
level in the comparator. The temperature-dependent
bias increases the supply voltage of the Hall plates and
adjusts the switching points to the decreasing induction
of magnets at higher temperatures. If the differential
magnetic field exceeds the threshold levels, the open
drain output switches to the appropriate state. The built-
in hysteresis eliminates oscillation and provides switch-
ing behavior of the output without oscillation.
Magnetic offset caused by mechanical stress at the Hall
plates is compensated for by using the “switching offset
compensation technique”: An internal oscillator pro-
vides a two phase clock (see Fig. 2–2). The difference
of the Hall voltages is sampled at the end of the first
phase. At the end of the second phase, both sampled
differential Hall voltages are averaged and compared
with the actual switching point. Subsequently, the open
drain output switches to the appropriate state. The
amount of time that elapses from crossing the magnetic
switch level to the actual switching of the output can vary
between zero and 1/f
osc
.
Shunt protection devices clamp voltage peaks at the
Output-Pin and V
DD
-Pin together with external series re-
sistors. Reverse current is limited at the V
DD
-Pin by an
internal series resistor up to –15 V. No external reverse
protection diode is needed at the V
DD
-Pin for values
ranging from 0 V to –15 V.
V
DD
1
Reverse
Voltage &
Overvoltage
Protection
Hall Plate
S1
Switch
Hall Plate
S2
DATA SHEET
HAL300
Temperature
Dependent
Bias
Hysteresis
Control
Short Circuit &
Overvoltage
Protection
Comparator
Output
OUT
3
Clock
GND
2
Fig. 2–1:
HAL300 block diagram
f
osc
t
DB
DB
ON
t
V
OUT
V
OH
V
OL
t
I
DD
1/f
osc
= 16
μs
t
f
t
Fig. 2–2:
Timing diagram
6
Micronas
MICRONAS [ MICRONAS ]
