HAL300
Ambient Temperature
µA
Due to the internal power dissipation, the temperature
2
on the silicon chip (junction temperature T ) is higher
10
J
V
DD
= 5 V
thanthetemperatureoutsidethepackage(ambienttem-
perature T ).
A
1
10
I
OH
T = T + ∆T
J
A
0
10
10
10
T = 125 °C
A
At static conditions, the following equations are valid:
–1
–2
–3
– for SOT-89A: ∆T = I * V * R
DD
DD
thJSB
thJA
– for TO-92UA: ∆T = I * V * R
DD
DD
T = 75 °C
A
10
10
For typical values, use the typical parameters. For worst
case calculation, use the max. parameters for I and
R , and the max. value for V from the application.
th
DD
–4
DD
T = 25 °C
A
–5
10
20
22
24
26
28
30 V
Test Circuits for Electromagnetic Compatibility
Test pulses V
corresponding to DIN 40839.
EMC
V
OH
Fig. 20: Typical output leakage current
R
V
versus output voltage
220 Ω
R
1.2 kΩ
L
1
V
DD
V
V
OUT
3
EMC
P
Application Notes
4.7 nF
Mechanical stress can change the sensitivity of the Hall
plates and an offset of the magnetic switching points
may result. External mechanical stress to the package
can influence the magnetic parameters if the sensor is
used under back-biased applications. This piezo sensi-
tivity of the sensor IC cannot be completely compen-
sated for by the switching offset compensation tech-
nique.
20 pF
2
GND
Fig. 21: Test circuit 2: test procedure for class A
For back-biased applications, the HAL320 is recom-
mended. In such cases, please contact our Application
Department. They will provide assistance in avoiding
applications which may induce stress to the ICs. This
stress may cause drifts of the magnetic parameters indi-
cated in this data sheet.
R
V
220 Ω
R
680 Ω
L
1
V
DD
OUT
3
V
EMC
For electromagnetic immunity, it is recommended to ap-
4.7 nF
ply a 4.7 nF capacitor between V (pin 1) and Ground
DD
(pin 2). For automotive applications, a 220 W series re-
2
GND
sistor to pin 1 is recommended. Because of the I peak
DD
at 4.1 V, the series resistor should not be greater than
270 Ω. The series resistor and the capacitor should be
placed as close as possible to the IC.
Fig. 22: Test circuit 1: test procedure for class C
Micronas
11