512Mb, Multiple I/O Serial Flash Memory
READ MEMORY Operations
READ MEMORY Operations
The device supports default reading and writing to an A[MAX:MIN] of A[23:0] (3-byte
address).
Reading and writing to an A[MAX:MIN] of A[31:0] (4-byte address) is also supported. Se-
lection of the 3-byte or 4-byte address range can be enabled in two ways: through the
nonvolatile configuration register or through the ENABLE 4-BYTE ADDRESS MODE/
EXIT 4-BYTE ADDRESS MODE commands. Further details for these settings and com-
mands are in the respective register and command sections of the data sheet.
After any READ command is executed, the device will output data from the selected ad-
dress in the die. After a die boundary is reached, the device will start reading again from
the beginning of the same 256Mb die.
A complete device reading is completed by executing read twice.
3-Byte Address
To execute READ MEMORY commands, S# is driven LOW. The command code is input
on DQn, followed by input on DQn of three address bytes. Each address bit is latched in
during the rising edge of the clock. The addressed byte can be at any location, and the
address automatically increments to the next address after each byte of data is shifted
out; therefore, a die can be read with a single command. The operation is terminated by
driving S# HIGH at any time during data output.
Table 25: Command/Address/Data Lines for READ MEMORY Commands
Note 1 applies to entire table
Command Name
DUAL
QUAD
FAST
DUAL OUTPUT INPUT/OUTPUT QUAD OUTPUT INPUT/OUTPUT
READ
03
READ
FAST READ
FAST READ
FAST READ
FAST READ
STR Mode
0B
0D
3B
3D
BB
BD
6B
6D
EB
ED
DTR Mode
–
Extended SPI Protocol
Supported
Yes
Yes
Yes
DQ0
Yes
Yes
DQ0
Yes
Command Input
Address Input
Data Output
DQ0
DQ0
DQ1
DQ0
DQ0
DQ1
DQ0
DQ0
DQ0
DQ[1:0]
DQ[1:0]
DQ0
DQ[3:0]
DQ[3:0]
DQ[1:0]
DQ[3:0]
Dual SPI Protocol
Supported
No
–
Yes
Yes
Yes
No
–
No
–
Command Input
Address Input
Data Output
DQ[1:0]
DQ[1:0]
DQ[1:0]
DQ[1:0]
DQ[1:0]
DQ[1:0]
DQ[1:0]
DQ[1:0]
DQ[1:0]
–
–
–
–
–
–
Quad SPI Protocol
Supported
No
–
Yes
No
–
No
–
Yes
Yes
Command Input
Address Input
DQ[3:0]
DQ[3:0]
DQ[3:0]
DQ[3:0]
DQ[3:0]
DQ[3:0]
–
–
–
PDF: 09005aef84752721
n25q_512mb_1ce_3V_65nm.pdf - Rev. O 05/13 EN
Micron Technology, Inc. reserves the right to change products or specifications without notice.
44
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