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N25Q512A83GSF40G 参数 Datasheet PDF下载

N25Q512A83GSF40G图片预览
型号: N25Q512A83GSF40G
PDF下载: 下载PDF文件 查看货源
内容描述: 美光的串行NOR闪存3V ,多个I / O, 4KB扇区擦除N25Q512A [Micron Serial NOR Flash Memory 3V, Multiple I/O, 4KB Sector Erase N25Q512A]
分类和应用: 闪存
文件页数/大小: 91 页 / 1214 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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512Mb, Multiple I/O Serial Flash Memory  
READ REGISTER and WRITE REGISTER Operations  
Figure 9: READ REGISTER Command  
Extended  
0
7
8
9
10  
11  
12  
13  
14  
15  
C
DQ0  
DQ1  
LSB  
Command  
High-Z  
MSB  
LSB  
DOUT  
MSB  
DOUT  
DOUT  
DOUT  
DOUT  
DOUT  
DOUT  
DOUT  
DOUT  
Dual  
0
3
4
5
6
7
C
LSB  
LSB  
DOUT  
DOUT  
DOUT  
DOUT  
DOUT  
MSB  
DQ[1:0]  
Command  
MSB  
Quad  
0
1
2
3
C
LSB  
LSB  
DOUT  
DOUT  
MSB  
DOUT  
DQ[3:0]  
Command  
Don’t Care  
MSB  
1. Supports all READ REGISTER commands except READ LOCK REGISTER.  
Notes:  
2. A READ NONVOLATILE CONFIGURATION REGISTER operation will output data starting  
from the least significant byte.  
READ NONVOLATILE CONFIGURATION REGISTER Command  
To execute a READ NONVOLATILE CONFIGURATION REGISTER command, S# is driv-  
en LOW. For extended SPI protocol, the command code is input on DQ0, and output on  
DQ1. For dual SPI protocol, the command code is input on DQ[1:0], and output on  
DQ[1:0]. For quad SPI protocol, the command code is input on DQ[3:0], and is output  
on DQ[3:0]. The operation is terminated by driving S# HIGH at any time during data  
output.  
The nonvolatile configuration register can be read continuously. After all 16 bits of the  
register have been read, a 0 is output. All reserved fields output a value of 1.  
READ VOLATILE or ENHANCED VOLATILE CONFIGURATION REGISTER Command  
To execute a READ VOLATILE CONFIGURATION REGISTER command or a READ EN-  
HANCED VOLATILE CONFIGURATION REGISTER command, S# is driven LOW. For ex-  
tended SPI protocol, the command code is input on DQ0, and output on DQ1. For dual  
SPI protocol, the command code is input on DQ[1:0], and output on DQ[1:0]. For quad  
SPI protocol, the command code is input on DQ[3:0], and is output on DQ[3:0]. The op-  
eration is terminated by driving S# HIGH at any time during data output.  
When the register is read continuously, the same byte is output repeatedly.  
PDF: 09005aef84752721  
n25q_512mb_1ce_3V_65nm.pdf - Rev. O 05/13 EN  
Micron Technology, Inc. reserves the right to change products or specifications without notice.  
32  
© 2011 Micron Technology, Inc. All rights reserved.  
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