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N25Q512A13GF840E 参数 Datasheet PDF下载

N25Q512A13GF840E图片预览
型号: N25Q512A13GF840E
PDF下载: 下载PDF文件 查看货源
内容描述: 美光的串行NOR闪存3V ,多个I / O, 4KB扇区擦除N25Q512A [Micron Serial NOR Flash Memory 3V, Multiple I/O, 4KB Sector Erase N25Q512A]
分类和应用: 闪存
文件页数/大小: 91 页 / 1214 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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512Mb, Multiple I/O Serial Flash Memory  
WRITE Operations  
WRITE Operations  
WRITE ENABLE Command  
The WRITE ENABLE operation sets the write enable latch bit. To execute a WRITE ENA-  
BLE command, S# is driven LOW and held LOW until the eighth bit of the command  
code has been latched in, after which it must be driven HIGH. The command code is  
input on DQ0 for extended SPI protocol, on DQ[1:0] for dual SPI protocol, and on  
DQ[3:0] for quad SPI protocol.  
The write enable latch bit must be set before every PROGRAM, ERASE, WRITE, ENTER  
4-BYTE ADDRESS MODE, and EXIT 4-BYTE ADDRESS MODE command. If S# is not  
driven HIGH after the command code has been latched in, the command is not execu-  
ted, flag status register error bits are not set, and the write enable latch remains cleared  
to its default setting of 0.  
WRITE DISABLE Command  
The WRITE DISABLE operation clears the write enable latch bit. To execute a WRITE  
DISABLE command, S# is driven LOW and held LOW until the eighth bit of the com-  
mand code has been latched in, after which it must be driven HIGH. The command  
code is input on DQ0 for extended SPI protocol, on DQ[1:0] for dual SPI protocol, and  
on DQ[3:0] for quad SPI protocol.  
If S# is not driven HIGH after the command code has been latched in, the command is  
not executed, flag status register error bits are not set, and the write enable latch re-  
mains set to 1.  
Note: In case of a protection error, write disable will not clear the write enable latch. In  
this situation, a CLEAR FLAG STATUS REGISTER command must be issued to clear  
both flags.  
PDF: 09005aef84752721  
n25q_512mb_1ce_3V_65nm.pdf - Rev. O 05/13 EN  
Micron Technology, Inc. reserves the right to change products or specifications without notice.  
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© 2011 Micron Technology, Inc. All rights reserved.  
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