512Mb : 32 Me g x 16, 16 Me g x 32 Mo b ile SDRAM
Tim in g Dia g ra m s
Fig u re 43: Sin g le READ – Wit h o u t Au t o Pre ch a rg e
T0
T1
T2
T3
T4
T5
T6
T7
T8
t
t
CL
CK
CLK
t
CH
t
t
CKS
CKH
CKE
t
t
CMS
CMH
3
3
COMMAND
ACTIVE
NOP
READ
NOP
NOP
PRECHARGE
NOP
ACTIVE
NOP
t
t
CMH
CMS
DQM
t
t
AH
AS
ROW
ROW
COLUMN
m
ADDR
t
t
t
AH
AS
AS
ALL BANKS
SINGLE BANK
BANK(S)
ROW
ROW
A10
DISABLE AUTO PRECHARGE
BANK
t
AH
BA0, BA1
BANK
BANK
t
t
OH
AC
DOUT m
DQ
t
LZ
t
HZ
t
t
RCD
CL
RP
t
t
RAS
RC
DON’T CARE
UNDEFINED
Notes: 1. For this example, BL = 1, CL = 2, and the READ burst is followed by a manual PRECHARGE.
PDF: 09005aef81ca5de4/Source: 09005aef81ca5e03
MT48H32M16LF_1.fm - Rev. H 6/07 EN
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2005 Micron Technology, Inc. All rights reserved.
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