256Mb, 3V Multiple I/O Serial Flash Memory
XIP Mode
XIP Mode
Execute-in-place (XIP) mode allows the memory to be read by sending an address to the
device and then receiving the data on one, two, or four pins in parallel, depending on
the customer requirements. XIP mode offers maximum flexibility to the application,
saves instruction overhead, and reduces random access time.
Activate and Terminate XIP Using Volatile Configuration Register
Applications that boot in SPI and must switch to XIP use the volatile configuration reg-
ister. XIP provides faster memory READ operations by requiring only an address to exe-
cute, rather than a command code and an address.
To activate XIP requires two steps. First, enable XIP by setting volatile configuration reg-
ister bit 3 to 0. Next, drive the XIP confirmation bit to 0 during the next FAST READ op-
eration. XIP is then active. Once in XIP, any command that occurs after S# is toggled re-
quires only address bits to execute; a command code is not necessary, and device oper-
ations use the SPI protocol that is enabled. XIP is terminated by driving the XIP confir-
mation bit to 1. The device automatically resets volatile configuration register bit 3 to 1.
Activate and Terminate XIP Using Nonvolatile Configuration Register
Applications that must boot directly in XIP use the nonvolatile configuration register. To
enable a device to power-up in XIP using this register, set nonvolatile configuration reg-
ister bits [11:9]. Settings vary according to protocol, as explained in the Nonvolatile
Configuration Register section. Because the device boots directly in XIP, after the power
cycle, no command code is necessary. XIP is terminated by driving the XIP confirmation
bit to 1.
Figure 47: XIP Mode Directly After Power-On
Mode 3
Mode 0
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16
C
tVSI (<100µ)
VCC
S#
NVCR check:
XIP enabled
A[MIN]
LSB
DOUT DOUT DOUT DOUT DOUT
Xb
DQ0
DOUT DOUT DOUT DOUT DOUT
MSB
DQ[3:1]
A[MAX]
Dummy cycles
1. Xb is the XIP confirmation bit and should be set as follows: 0 to keep XIP state; 1 to exit
XIP mode and return to standard read mode.
Note:
CCMTD-1725822587-3368
mt25q-qljs-L256-ABA-xxT.pdf - Rev. K 07/18 EN
Micron Technology, Inc. reserves the right to change products or specifications without notice.
79
© 2014 Micron Technology, Inc. All rights reserved.
MICRON [ MICRON TECHNOLOGY ]
