256Mb, 3V Multiple I/O Serial Flash Memory
READ MEMORY Operations Timings
Figure 26: DTR FAST READ – 0Dh/0Eh3
Extended
0
7
8
C
x
C
LSB
A[MIN]
DQ0
Command
MSB
A[MAX]
LSB
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
DQ1
High-Z
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT OUT
MSB
Dummy cycles
Dual
0
3
4
C
x
C
LSB
A[MIN]
LSB
D
D
D
D
D
D
D
D
DQ[1:0]
Command
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
MSB
A[MAX]
2
MSB
Dummy cycles
Quad
0
1
C
x
C
LSB
A[MIN]
LSB
D
D
D
D
DQ[3:0]
Command
OUT
OUT
OUT OUT
MSB
A[MAX]
MSB
Don’t Care
Dummy cycles
1. For extended protocol, Cx = 7 + (A[MAX] + 1)/2; For dual protocol,
Cx = 3 + (A[MAX] + 1)/4; For quad protocol, Cx = 1 + (A[MAX] + 1)/8.
Notes:
2. S# not shown.
3. DTR FAST READ and 4-BYTE DTR FAST READ commands.
Figure 27: DTR DUAL OUTPUT FAST READ – 3Dh3
Extended
0
7
8
C
x
C
LSB
A[MIN]
LSB
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
DQ0
Command
High-Z
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
MSB
A[MAX]
D
DQ1
OUT
OUT
OUT
OUT
MSB
Dummy cycles
Dual
0
3
4
C
x
C
LSB
A[MIN]
LSB
DOUT
MSB
DOUT DOUT DOUT DOUT DOUT DOUT DOUT
DQ[1:0]
Command
MSB
A[MAX]
Dummy cycles
1. For extended protocol, Cx = 7 + (A[MAX] + 1)/2; For dual protocol,
Cx = 3 + (A[MAX] + 1)/4.
Notes:
2. S# not shown.
3. DTR DUAL OUTPUT FAST READ and 4-BYTE DTR DUAL OUTPUT FAST READ commands.
CCMTD-1725822587-3368
mt25q-qljs-L256-ABA-xxT.pdf - Rev. K 07/18 EN
Micron Technology, Inc. reserves the right to change products or specifications without notice.
54
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