256Mb, 3V Multiple I/O Serial Flash Memory
AC Reset Specifications
Figure 53: Serial Input Timing DTR
tSHSL
S#
tSHCH
tCLSH
tCHSL tSLCH
C
tDVCL tCLCH
tCLDX
tDVCH
MSB
tCHCL
LSB
DQ0
DQ1
tCHDX
High-Z
High-Z
Figure 54: Write Protect Setup and Hold During WRITE STATUS REGISTER Operation (SRWD = 1)
W#
tWHSL
tSHWL
S#
C
DQ0
DQ1
High-Z
High-Z
Don’t Care
Figure 55: Hold Timing
S#
C
tCHHL tHLCH
tHHCH
tCHHH
tHLQZ
tHHQX
DQ0
DQ1
HOLD#
Don’t Care
CCMTD-1725822587-3368
mt25q-qljs-L256-ABA-xxT.pdf - Rev. K 07/18 EN
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© 2014 Micron Technology, Inc. All rights reserved.
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