1GB (x72, ECC, DR) 200-Pin DDR SDRAM SODIMM
DD Specifications
I
IDD Specifications
Table 8:
IDD Specifications and Conditions – 1GB
Values are shown for the MT46V64M8 DDR SDRAM only and are computed from values specified in the
512Mb (64 Meg x 8) component data sheet
-26A/
-265
Parameter/Condition
Symbol
-40B
-335
Units
IDD01
1,440
1,215
1,080
mA
Operating one bank active-precharge current: One device
bank; Active-precharge; tRC = tRC (MIN); tCK = tCK (MIN); DQ,
DM, and DQS inputs changing once per clock cycle; Address
and control inputs changing once every two clock cycles
IDD11
1,710
1,485
1,350
mA
Operating one bank active-read-precharge current: One
device bank; Active-read precharge; BL = 4; tRC = tRC (MIN);
tCK = tCK (MIN); IOUT = 0mA; Address and control inputs
changing once per clock cycle
IDD2P2
IDD2F2
90
90
90
mA
mA
Precharge power-down standby current: All device banks
idle; Power-down mode; tCK = tCK (MIN); CKE = (LOW)
990
810
720
Idle standby current: CS# = HIGH; All device banks idle;
tCK = tCK (MIN); CKE = HIGH; Address and other control
inputs changing once per clock cycle; VIN = VREF for DQ, DQS,
and DM
IDD3P2
IDD3N2
810
630
900
540
810
mA
mA
Active power-down standby current: One device bank
active; Power-down mode; tCK = tCK (MIN); CKE = LOW
1,080
Active standby current: CS# = HIGH; CKE = HIGH; One
device bank; Active-precharge; tRC = tRAS (MAX);
tCK = tCK (MIN); DQ, DM, and DQS inputs changing twice per
clock cycle; Address and other control inputs changing once
per clock cycle
IDD4R1
1,755
1,800
1,530
1,320
1,350
1,260
mA
mA
Operating burst read current: BL = 2; Continuous burst
reads; One device bank active; Address and control inputs
changing once per clock cycle; tCK = tCK (MIN); IOUT = 0mA
IDD4W1
Operating burst write current: BL = 2; Continuous burst
writes; One device bank active; Address and control inputs
changing once per clock cycle; tCK = tCK (MIN); DQ, DM, and
DQS inputs changing twice per clock cycle
IDD52
IDD5A2
IDD62
6,210
198
5,220
180
5,040
180
mA
mA
mA
mA
Auto refresh current
tREFC = tRFC (MIN)
tREFC = 7.8125µs
90
90
90
Self refresh current: CKE ≤ 0.2V
IDD71
4,095
3,690
3,195
Operating bank interleave read current: Four device bank
interleaving reads; (BL = 4) with auto precharge;
tRC = tRC (MIN); tCK = tCK (MIN); Address and control inputs
change only during active READ or WRITE commands
Notes: 1. Value calculated as one module rank in this operating condition; all other module ranks are
in IDD2P (CKE LOW) mode.
2. Value calculated reflects all module ranks in this operating condition.
PDF: 09005aef80e4880c/Source: 09005aef80e487d7
DDF18C128x72H.fm - Rev. B 10/07 EN
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2004 Micron Technology, Inc. All rights reserved.
8
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