512MB, 1GB (x64)
200-PIN DDR SODIMM
Table 12: IDD Specifications and Conditions – 512MB
Notes: 1–5, 8, 10, 12, 48; DDR SDRAM devices only; notes appear on pages 20–23; 0°Cꢀ? TA ? +70°C; VDD, VDDQ = +2.5V 0.2V
MAX
-26A/-
265
UNIT NOTE
PARAMETER/CONDITION
SYM
-335
-262
-202
S
S
a
IDD0
1,032
1,032
872
992
mA 20, 42
OPERATING CURRENT: One device bank; Active-
Precharge; tRC = tRC (MIN); tCK = tCK (MIN); DQ, DM and
DQS inputs changing once per clock cycle; Address and
control inputs changing once every two clock cycles
a
IDD1
1,392
1,312
1,192
1,272
mA 20, 42
OPERATING CURRENT: One device bank; Active-Read-
Precharge; Burst = 4; tRC = tRC (MIN); tCK = tCK (MIN);
IOUT = 0mA; Address and control inputs changing once
per clock cycle
b
IDD2P
IDD2F
64
64
64
64
mA 21, 28,
44
PRECHARGE POWER-DOWN STANDBY CURRENT: All
device banks idle; Power-down mode; tCK = tCK (MIN);
CKE = (LOW)
b
800
720
720
720
mA
45
IDLE STANDBY CURRENT: CS# = HIGH; All device banks
are idle; tCK = tCK (MIN); CKE = HIGH; Address and other
control inputs changing once per clock cycle. VIN = VREF
for DQ, DQS, and DM
b
b
IDD3P
480
960
400
800
400
800
480
800
mA 21, 28,
44
ACTIVE POWER-DOWN STANDBY CURRENT: One device
bank active; Power-down mode; tCK = tCK (MIN);
CKE = LOW
IDD3N
mA
41
ACTIVE STANDBY CURRENT: CS# = HIGH; CKE = HIGH;
One device bank active; tRC = tRAS (MAX); tCK = tCK
(MIN); DQ, DM and DQS inputs changing twice per clock
cycle; Address and other control inputs changing once per
clock cycle
a
IDD4R
1,432
1,272
1,232
1,112
1,232
1,122
1,432
1,552
mA 20, 42
OPERATING CURRENT: Burst = 2; Reads; Continuous
burst; One device bank active; Address and control inputs
changing once per clock cycle; tCK = tCK (MIN); IOUT =
0mA
a
IDD4W
mA
20
OPERATING CURRENT: Burst = 2; Writes; Continuous
burst; One device bank active; Address and control
inputs changing once per clock cycle; tCK = tCK (MIN); DQ,
DM, and DQS inputs changing twice per clock cycle
b
tRC = tRFC
IDD5
4,080
96
3,760
96
3,760
96
3,920
96
mA 20, 44
mA 24, 44
AUTO REFRESH BURST CURRENT:
(MIN) tRFC =
7.8125µs
IDD5A
b
b
SELF REFRESH CURRENT: CKE ? 0.2V
IDD6
IDD7
64
64
64
64
mA
9
a
3,272
2,832
2,832
2,952
mA 20, 43
OPERATING CURRENT: Four device bank interleaving
READs (Burst = 4) with auto precharge, tRC = minimum
tRC allowed; tCK = tCK (MIN); Address and control inputs
change only during Active READ, or WRITE commands
NOTE:
a - Value calculated as one module rank in this operating condition, and all other module ranks in IDD2p (CKE LOW) mode.
b - Value calculated reflects all module ranks in this operating condition.
09005aef80a646bc
DDF16C64_128x64HG_B.fm - Rev. B 7/03 EN
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2003 Micron Technology, Inc.
14
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