512MB, 1GB (x64)
200-PIN DDR SODIMM
Table 13: IDD Specifications and Conditions – 1GB
Notes: 1–5, 8, 10, 12, 48; DDR SDRAM devices only; notes appear on pages 20–23; 0°Cꢀ? TA ? +70°C; VDD, VDDQ = +2.5V 0.2V
MAX
-26A/-
265
UNIT NOTE
PARAMETER/CONDITION
SYM
-335
-262
-202
S
S
1,080
1,080
960
960
mA 20, 42
OPERATING CURRENT: One device bank; Active-
IDD0
Precharge; tRC = tRC (MIN); tCK = tCK (MIN); DQ, DM and
DQS inputs changing once per clock cycle; Address and
control inputs changing once every two clock cycles
1,320
1,320
1,200
1,200
mA 20, 42
OPERATING CURRENT: One device bank; Active-Read-
IDD1
Precharge; Burst = 4; tRC = tRC (MIN); tCK = tCK (MIN);
IOUT = 0mA; Address and control inputs changing once
per clock cycle
80
80
80
80
mA 21, 28,
44
PRECHARGE POWER-DOWN STANDBY CURRENT: All
device banks idle; Power-down mode; tCK = tCK (MIN);
CKE = (LOW)
IDD2P
720
720
640
640
mA
45
IDLE STANDBY CURRENT: CS# = HIGH; All device banks IDD2F
are idle; tCK = tCK (MIN); CKE = HIGH; Address and other
control inputs changing once per clock cycle. VIN = VREF
for DQ, DQS, and DM
560
720
560
720
480
640
480
640
mA 21, 28,
44
ACTIVE POWER-DOWN STANDBY CURRENT: One device
bank active; Power-down mode; tCK = tCK (MIN);
CKE = LOW
IDD3P
IDD3N
mA
41
ACTIVE STANDBY CURRENT: CS# = HIGH; CKE = HIGH;
One device bank active; tRC = tRAS (MAX); tCK = tCK
(MIN); DQ, DM and DQS inputs changing twice per clock
cycle; Address and other control inputs changing once per
clock cycle
1,360
1,280
4,640
1,360
1,280
4,640
1,200
1,120
4,480
1,200
1,120
4,480
mA 20, 42
OPERATING CURRENT: Burst = 2; Reads; Continuous
burst; One device bank active; Address and control inputs
changing once per clock cycle; tCK = tCK (MIN); IOUT =
0mA
IDD4R
mA
20
OPERATING CURRENT: Burst = 2; Writes; Continuous
burst; One device bank active; Address and control
inputs changing once per clock cycle; tCK = tCK (MIN); DQ,
DM, and DQS inputs changing twice per clock cycle
IDD4W
tRC = tRFC (MIN)
mA 20, 44
mA 24, 44
AUTO REFRESH BURST CURRENT:
IDD5
tRC = 7.8125µs
160
80
160
80
160
80
160
80
IDD5A
mA
9
SELF REFRESH CURRENT: CKE ? 0.2V
IDD6
IDD7
3,280
3,240
2,840
2,840
mA 20, 43
OPERATING CURRENT: Four device bank interleaving
READs (Burst = 4) with auto precharge, tRC = minimum
tRC allowed; tCK = tCK (MIN); Address and control inputs
change only during Active READ, or WRITE commands
NOTE:
a - Value calculated as one module rank in this operating condition, and all other module ranks in IDD2p (CKE LOW) mode.
b - Value calculated reflects all module ranks in this operating condition.
09005aef80a646bc
DDF16C64_128x64HG_B.fm - Rev. B 7/03 EN
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2003 Micron Technology, Inc.
15
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