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MT16VDDF6464HG-265 参数 Datasheet PDF下载

MT16VDDF6464HG-265图片预览
型号: MT16VDDF6464HG-265
PDF下载: 下载PDF文件 查看货源
内容描述: 小外形的DDR SDRAM DIMM [SMALL-OUTLINE DDR SDRAM DIMM]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 31 页 / 552 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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512MB, 1GB (x64)  
200-PIN DDR SODIMM  
Table 21: Serial Presence-Detect Matrix  
“1”/“0”: Serial Data, “driven to HIGH”/“driven to LOW”; notes appear on page 29  
BYTE  
DESCRIPTION  
ENTRY (VERSION)  
MT16VDDF6464H MT16VDDF12864H  
0
1
2
3
4
5
6
7
8
9
128  
80  
08  
07  
0D  
0A  
02  
40  
00  
04  
80  
08  
07  
0D  
0B  
02  
40  
00  
04  
Number of Bytes Used by Micron  
Total Number of Bytes in SPD Device  
Fundamental Memory Type  
256  
SDRAM DDR  
13  
Number of Rows Addresses on Assembly  
Number of Column Addresses on Assembly  
Number of Physical Ranks on DIMM  
Module Data With  
11, 12  
2
64  
0
Module Data With (Continued)  
Moduel Voltage Interface Levels  
SDRAM Cycle Time, (tCK), CAS Latency = 2.5  
(See note 1)  
SSTL 2.5V  
6ns (-335)  
7ns (-262/-26A)  
7.5ns( -265)  
8ns (-202)  
60  
70  
75  
80  
60  
70  
75  
80  
SDRAM Access From Clock,(tAC),  
CAS Latency = 2.5  
10  
0.7ns (-335)  
0.75ns (-262/-26A/-265)  
0.8ns (-202)  
70  
75  
80  
70  
75  
80  
11  
12  
13  
14  
15  
Non-ECC  
7.8µs/SELF  
x8  
00  
82  
08  
00  
01  
00  
82  
08  
00  
01  
Module Configuration Type  
Refresh Rate/Type  
SDRAM Device Width (Primary SDRAM)  
Error-checking SDRAM Data Width  
Non-ECC  
1 clock  
Minimum Clock Delay, Back-to-Back Random  
Column Access  
16  
17  
18  
19  
20  
21  
22  
23  
Burst Lengths Supported  
Number of Banks on SDRAM Device  
CAS Latencies Supported  
CS Latency  
2, 4, 8  
0E  
04  
0C  
01  
02  
20  
C0  
0E  
04  
0C  
01  
02  
20  
C0  
4
2, 2.5  
0
WE Latency  
1
SDRAM Module Attributes  
SDRAM Device Attributes: General  
SDRAM Cycle Time, (tCK), CAS Latency = 2  
(See note 1)  
Unbuffered/Diff. Clock  
Fast/Concurrent AP  
7.5ns (-335/-262/-26A)  
10ns (-265/-202)  
75  
A0  
75  
A0  
SDRAM Access From CK, (tAC), CAS Latency = 2  
24  
0.7ns (-335)  
0.75ns (-262/-26A/-265)  
0.8ns (-202)  
70  
75  
80  
70  
75  
80  
SDRAM Cycle Time, (tCK), CAS Latency = 1.5  
SDRAM Access From CK, (tAC),  
CAS Latency = 1.5  
25  
26  
N/A  
00  
00  
N/A  
00  
00  
Minimum Row Precharge Time, (tRP)  
27  
18ns (-335)  
15ns (-262)  
20ns (-26A/-265/-202)  
48  
3C  
50  
48  
3C  
50  
Minimum Row to Row Active, (tRRD)  
Minimum RAS# to CAS# Delay, (tRCD)  
28  
29  
12ns (-335)  
15 ns (-262/-26A/-265/-202)  
30  
3C  
30  
3C  
18ns (-335)  
15ns (-262)  
20ns (-26A/-265/-202)  
48  
3C  
50  
48  
3C  
50  
09005aef80a646bc  
DDF16C64_128x64HG_B.fm - Rev. B 7/03 EN  
Micron Technology, Inc., reserves the right to change products or specifications without notice.  
©2003 Micron Technology, Inc.  
27  
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