256MB, 512MB (x64, DR)
144-PIN SDRAM SODIMM
Table 14: Electrical Characteristics and Recommended AC Operating Conditions
Notes: 5, 6, 8, 9, 11, 31; notes appear on page 16; comply with PC100 and PC133 specifications, based on SDRAM device
AC CHARACTERISTICS
PARAMETER
-13E
MAX
-133
MAX
-10E
MAX
SYMBOL MIN
MIN
MIN
UNITS
ns
NOTES
tAC(3)
tAC(2)
5.4
5.4
5.4
6
6
6
27
Access time from
CLK (positive edge)
CL = 3
CL = 2
ns
tAH
0.8
tAS
1.5
tCH
2.5
tCL
2.5
tCK(3)
7
tCK(2)
7.5
tCKH
0.8
tCKS
1.5
0.8
1.5
2.5
2.5
7.5
10
1
2
ns
Address hold time
Address setup time
CLK high-level width
CLK low-level width
Clock cycle time
ns
3
ns
3
ns
8
ns
23
23
CL = 3
CL = 2
10
1
ns
0.8
1.5
0.8
ns
CKE hold time
CKE setup time
2
ns
tCMH
0.8
1
ns
CS#, RAS#, CAS#, WE#, DQM hold
time
tCMS
1.5
1.5
2
ns
CS#, RAS#, CAS#, WE#, DQM setup
time
tDH
0.8
tDS
1.5
tHZ(3)
tHZ(2)
tLZ
1
tOH
3
tOHN
1.8
tRAS
37
tRC
60
tRCD
15
tREF
tRFC
66
tRP
15
0.8
1.5
1
2
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ns
ns
ns
Data-in hold time
Data-in setup time
5.4
5.4
5.4
6
6
6
10
10
Data-out High-Z time
CL = 3
CL = 2
1
3
1
3
Data-out Low-Z time
Data-out hold time (load)
Data-out hold time (no load)
1.8
44
66
20
1.8
50
70
20
28
32
120,000
64
120,000
64
120,000
64
ACTIVE-to-PRECHARGE command
ACTIVE-to-ACTIVE command period
ACTIVE-to-READ or WRITE delay
Refresh period
66
20
15
70
20
20
AUTO REFRESH period
PRECHARGE command period
tRRD
14
ACTIVE bank a to ACTIVE bank b
command
tT
tWR
0.3
1.2
0.3
1.2
0.3
1.2
ns
ns
7
Transition time
1 CLK
+ 7ns
1 CLK +
7.5ns
1 CLK
+ 7ns
24
WRITE recovery time
14
15
75
15
80
ns
ns
25
20
tXSR
67
Exit SELF REFRESH to ACTIVE
command
pdf: 09005aef807924d2, source: 09005aef807924f1
SDF16C32_64x64HG.fm - Rev. E 4/06 EN
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2006 Micron Technology, Inc. All rights reserved.
14
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