256Mb: 3V Embedded Parallel NOR Flash
Write AC Characteristics
Figure 39: Chip/Block Erase AC Timing (8-Bit Mode)
t
WC
A[MAX:0]/
AAAh
AAAh
t
555h
AAAh
AAAh
555h
BAh1
A–1
t
AS
AH
t
CH
t
CS
CE#
t
GHWL
OE#
t
t
WP
WPH
55h
WE#
t
DS
t
10h/
30h
DQ[7:0]
Notes:
AAh
80h
AAh
55h
DH
1. For a CHIP ERASE command, the address is AAAh, and the data is 10h; for a BLOCK
ERASE command, the address is BAd, and the data is 30h.
2. BAd is the block address.
3. See the following tables for timing details: Read AC Characteristics, WE#-Controlled
Write AC Characteristics, and CE#-Controlled Write AC Characteristics.
PDF: 09005aef84bd3b68
m29w_256mb.pdf - Rev. B 5/13 EN
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