256Mb: 3V Embedded Parallel NOR Flash
Signal Assignments
Figure 18: 64-Ball Fortified BGA and 64-Ball TBGA
1
2
3
4
5
6
7
8
8
7
6
5
4
3
2
1
A
B
C
D
E
A
B
C
D
E
RFU
RFU
RFU
RFU
RFU
A3
A7 RY/BY# WE# A9
A13 RFU
A12 A22
RFU A13
A22 A12
A9 WE# RY/BY# A7
A3
A4
A2
A1
A0
RFU
RFU
RFU
RFU
RFU
A4 A17
V
/WP# RST# A8
A8 RST# V /WP# A17
PP
PP
A2
A1
A0
A6
A5
D0
A18 A21 A10 A14 A23
A20 A19 A11 A15 VCCQ
A23 A14 A10 A21 A18
VCCQ A15 A11 A19 A20
A6
A5
D0
D8
D9
D1
D2
D5
D7
A16
VSS
VSS A16
D7
D5
D2
F
F
VCCQ CE# D8
RFU OE# D9
D10 D12 D14 BYTE# RFU
D11 VCC D13 D15/A-1 RFU
RFU BYTE# D14 D12 D10
RFU D15/A-1 D13 VCC D11
CE# VCCQ
OE# RFU
G
H
G
H
RFU VSS
D1
D3
D4
D6
VSS
RFU
RFU VSS
D6
D4
D3
VSS
RFU
Top view – ball side down
Bottom view – ball side up
1. A[23] = A[MAX].
2. A-1 is the least significant address bit in x8 mode.
Notes:
PDF: 09005aef84bd3b68
m29w_256mb.pdf - Rev. B 5/13 EN
Micron Technology, Inc. reserves the right to change products or specifications without notice.
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