256Mb: 3V Embedded Parallel NOR Flash
Device Protection
Device Protection
Hardware Protection
The VPP/WP# function provides a hardware method of protecting the highest or lowest
block. When VPP/WP# is LOW, PROGRAM and ERASE operations on either of these
blocks is ignored to provide protection. When VPP/WP# is HIGH, the device reverts to
the previous protection status for the highest or lowest block. PROGRAM and ERASE
operations can modify the data in this block unless the block is protected using block
protection.
When VPP/WP# protect is raised to VPPH, the device automatically enters the unlock by-
pass mode, and command execution time is faster. This must never be done from any
mode except read mode; otherwise, the device might be left in an indeterminate state.
A 0.1μF capacitor should be connected between VPP/WP# and the VSS ground pin to de-
couple the current surges from the power supply. The PCB track widths must be suffi-
cient to carry the currents required during unlock bypass program.
When VPP/WP# returns to HIGH or LOW, normal operation resumes. When operations
execute in unlock bypass mode, the device draws IPP from the pin to supply the pro-
gramming circuits. Transitions from HIGH to VPPH and from VPPH to LOW must be slow-
er than tVHVPP.
Note: Micron highly recommends driving VPP/WP# HIGH or LOW. If a system needs to
float VPP/WP#, without a pull-up/pull-down resistor and no capacitor, then an internal
pull-up resistor is enabled.
Table 14: VPP/WP# Functions
VPP/WP# Settings
Function
VIL
VIH
Highest (29WxxxGH) or lowest (29WxxxGL) block is protected.
Highest or lowest block is unprotected unless software protection is activated.
Unlock bypass mode supplies current necessary to speed up PROGRAM execution time.
VPPH
Software Protection
Software protection includes volatile, nonvolatile, and password protection as well as
password access. The device is shipped with all blocks unprotected. On first use, the de-
vice defaults to the nonvolatile protection mode but can be activated in either the non-
volatile protection or password protection mode.
The desired protection mode is activated by setting either the nonvolatile protection
mode lock bit or the password protection mode lock bit of the lock register. (See the
Lock Register section.) Both bits are one-time-programmable and nonvolatile; there-
fore, after the protection mode has been activated, it cannot be changed, and the device
is set permanently to operate in the selected protection mode. It is recommended that
the desired software protection mode be activated when first programming the device.
For the lowest and highest blocks, a higher level of block protection can be achieved by
locking the blocks using nonvolatile protection mode and holding VPP /WP# LOW.
PDF: 09005aef84bd3b68
m29w_256mb.pdf - Rev. C 7/13 EN
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