128Mb 3V Embedded Parallel NOR Flash
Standard Command Definitions – Address-Data Cycles
Table 9: Standard Command Definitions – Address-Data Cycles, 8-Bit and 16-Bit (Continued)
Note 1 applies to entire table
Address and Data Cycles
1st
2nd
3rd
4th
5th
6th
Command and
Code/Subcode
Bus
Size
A
D
A
D
A
D
A
D
A
D
A
D
Notes
ENHANCED
BUFFERED
PROGRAM CONFIRM
(29h)
x8
NA
NA
x16 BAd
(00)
29
ENHANCED
x8
BUFFERED
PROGRAM ABORT (F0h)
x16
555
X
AA 2AA
B0
55
555
F0
PROGRAM SUSPEND
(B0h)
x8
x16
x8
PROGRAM RESUME
(30h)
X
30
x16
ERASE Operations
CHIP ERASE (80/10h)
x8
x16
x8
AAA AA
555
555
2AA
X
55
10
55
30
AAA
555
80 AAA AA
555
555
55
55
AAA
555
10
30
2AA
UNLOCK BYPASS
CHIP ERASE (80/10h)
X
80
5
11
5
x16
x8
BLOCK ERASE (80/30h)
AAA AA
555
555
2AA
BAd
AAA
555
80 AAA AA
555
555
BAd
x16
x8
2AA
UNLOCK BYPASS
BLOCK ERASE (80/30h)
X
X
X
80
B0
30
x16
x8
ERASE SUSPEND (B0h)
x16
x8
ERASE RESUME (30h)
x16
1. A = Address; D = Data; X = "Don't Care"; BAd = Any address in the block; N = Number of
bytes to be programmed; PA = Program address; PD = Program data; Gray shading = Not
applicable. All values in the table are hexadecimal. Some commands require both a com-
mand code and subcode.
Notes:
2. These cells represent READ cycles (versus WRITE cycles for the others).
3. AUTO SELECT enables the device to read the manufacturer code, device code, block pro-
tection status, and extended memory block protection indicator.
4. AUTO SELECT addresses and data are specified in the Electronic Signature table and the
Extended Memory Block Protection table.
5. For any UNLOCK BYPASS ERASE/PROGRAM command, the first two UNLOCK cycles are
unnecessary.
6. BAd must be the same as the address loaded during the WRITE TO BUFFER PROGRAM
3rd and 4th cycles.
7. WRITE TO BUFFER PROGRAM operation: maximum cycles = 68(x8) and 36 (x16). UNLOCK
BYPASS WRITE TO BUFFER PROGRAM operation: maximum cycles = 66 (x8), 34 (x16).
PDF: 09005aef84daa141
m29w_128mb.pdf - Rev. A 7/13 EN
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