256Mb: 3V Embedded Parallel NOR Flash
Device Protection
tion bit lock bit can be cleared only by taking the device through a hardware reset or
power-up.
Nonvolatile protection bits cannot be cleared individually; they must be cleared all at
once using a CLEAR ALL NONVOLATILE PROTECTION BITS command. They will re-
main set through a hardware reset or a power-down/power-up sequence.
If one of the nonvolatile protection bits needs to be cleared (unprotected), additional
steps are required: First, the nonvolatile protection bit lock bit must be cleared to 1, us-
ing either a power-cycle or hardware reset. Then, the nonvolatile protection bits can be
changed to reflect the desired settings. Finally, the nonvolatile protection bit lock bit
must be set to 0 to lock the nonvolatile protection bits. The device now will operate nor-
mally.
To achieve the best protection, the PROGRAM NONVOLATILE PROTECTION LOCK BIT
command should be executed early in the boot code, and the boot code should be pro-
tected by holding VPP/WP# LOW.
Nonvolatile protection bits and volatile protection bits have the same function when
VPP/WP# is HIGH or when VPP/WP# is at the voltage for program acceleration (VPPH ).
Password Protection Mode
Password protection mode provides a higher level of security than the nonvolatile pro-
tection mode by requiring a 64-bit password to unlock the nonvolatile protection bit
lock bit. In addition to this password requirement, the nonvolatile protection bit lock
bit is set to 0 after power-up and reset to maintain the device in password protection
mode.
Executing the UNLOCK PASSWORD command by entering the correct password clears
the nonvolatile protection bit lock bit, enabling the block nonvolatile protection bits to
be modified. If the password provided is incorrect, the nonvolatile protection bit lock
bit remains locked, and the state of the nonvolatile protection bits cannot be modified.
To place the device in password protection mode, the following two steps are required:
First, before activating the password protection mode, a 64-bit password must be set
and the setting verified. Password verification is allowed only before the password pro-
tection mode is activated. Next, password protection mode is activated by program-
ming the password protection mode lock bit to 0. This operation is irreversible; after the
bit is programmed, it cannot be erased. The device remains permanently in password
protection mode, and the 64-bit password can be neither retrieved nor reprogrammed.
In addition, all commands to the address where the password is stored are disabled.
Note: There is no means to verify the password after password protection mode is ena-
bled. If the password is lost after enabling the password protection mode, there is no
way to clear the nonvolatile protection bit lock bit.
NVPBs default to ‘1’ (block unprotected) after power-up and hardware reset. A block is
protected or unprotected when its NVPB is set to ‘0’ and ‘1’, respectively. NVPBs are
programmed individually and cleared collectively.
VPB default status depends on ordering option. A block is protected or unprotected
when its VPB is set to ‘0’ and ‘1’, respectively. VPBs are programmed and cleared indi-
vidually. For the volatile protection to be effective, the NVPB lock bit must be set to ‘0’
(NVPB bits unlocked) and the block NVPB must be set to ‘1’ (block unprotected).
PDF: 09005aef84ecabef
m29dw_256g.pdf - Rev. A 10/12 EN
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