256Mb: 3V Embedded Parallel NOR Flash
Standard Command Definitions – Address-Data Cycles
PROGRAM operation: N + 1 = bytes to be programmed; maximum buffer size = 32 words
(x16).
8. For x16, A[MAX:5] address pins should remain unchanged while A[4:0] pins are used to
select a word within the N + 1 word page.
9. The following is content for address-data cycles 256 through 258: BAd (FE) - Data; BAd
(FF) - Data; BAd (00) - 29.
10. BLOCK ERASE address cycles can extend beyond six address-data cycles, depending on
the number of blocks to erase.
PDF: 09005aef84ecabef
m29dw_256g.pdf - Rev. A 10/12 EN
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