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M25PX16 参数 Datasheet PDF下载

M25PX16图片预览
型号: M25PX16
PDF下载: 下载PDF文件 查看货源
内容描述: 16兆位,双I / O , 4 KB的界别分组擦除,串行闪存与75 MHz的SPI总线接口 [16-Mbit, dual I/O, 4-Kbyte subsector erase, serial Flash memory with 75 MHz SPI bus interface]
分类和应用: 闪存
文件页数/大小: 65 页 / 1418 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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M25PX16  
Operating features  
4
Operating features  
4.1  
Page programming  
To program one data byte, two instructions are required: Write Enable (WREN), which is  
one byte, and a Page Program (PP) sequence, which consists of four bytes plus data. This  
is followed by the internal Program cycle (of duration t ).  
PP  
To spread this overhead, the Page Program (PP) instruction allows up to 256 bytes to be  
programmed at a time (changing bits from 1 to 0), provided that they lie in consecutive  
addresses on the same page of memory.  
For optimized timings, it is recommended to use the Page Program (PP) instruction to  
program all consecutive targeted bytes in a single sequence versus using several Page  
Program (PP) sequences with each containing only a few bytes (see Page Program (PP)  
and Table 18: AC characteristics).  
4.2  
4.3  
Dual Input Fast Program  
The Dual Input Fast Program (DIFP) instruction makes it possible to program up to 256  
bytes using two input pins at the same time (by changing bits from 1 to 0).  
For optimized timings, it is recommended to use the Dual Input Fast Program (DIFP)  
instruction to program all consecutive targeted bytes in a single sequence rather to using  
several Dual Input Fast Program (DIFP) sequences each containing only a few bytes (see  
Section 6.12: Dual Input Fast Program (DIFP)).  
Subsector Erase, Sector Erase and Bulk Erase  
The Page Program (PP) instruction allows bits to be reset from 1 to 0. Before this can be  
applied, the bytes of memory need to have been erased to all 1s (FFh). This can be  
achieved either a subsector at a time, using the Subsector Erase (SSE) instruction, a sector  
at a time, using the Sector Erase (SE) instruction, or throughout the entire memory, using  
the Bulk Erase (BE) instruction. This starts an internal Erase cycle (of duration t  
, t or  
SSE SE  
t
).  
BE  
The Erase instruction must be preceded by a Write Enable (WREN) instruction.  
4.4  
Polling during a Write, Program or Erase cycle  
A further improvement in the time to Write Status Register (WRSR), Program OTP (POTP),  
Program (PP), Dual Input Fast Program (DIFP) or Erase (SSE, SE or BE) can be achieved  
by not waiting for the worst case delay (t , t , t  
, t , or t ). The Write In Progress  
W
PP SSE SE  
BE  
(WIP) bit is provided in the Status Register so that the application program can monitor its  
value, polling it to establish when the previous Write cycle, Program cycle or Erase cycle is  
complete.  
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