Micron M25P40 Serial Flash Embedded Memory
READ DATA BYTES at HIGHER SPEED
READ DATA BYTES at HIGHER SPEED
The device is first selected by driving chip select (S#) LOW. The command code for the
READ DATA BYTES at HIGHER SPEED command is followed by a 3-byte address (A23-
A0) and a dummy byte, each bit being latched-in during the rising edge of serial clock
(C). Then the memory contents at that address are shifted out on serial data output
(DQ1) at a maximum frequency fC, during the falling edge of C.
The first byte addressed can be at any location. The address is automatically incremen-
ted to the next higher address after each byte of data is shifted out. Therefore, the entire
memory can be read with a single READ DATA BYTES at HIGHER SPEED command.
When the highest address is reached, the address counter rolls over to 000000h, allow-
ing the read sequence to be continued indefinitely.
The READ DATA BYTES at HIGHER SPEED command is terminated by driving S# HIGH.
S# can be driven HIGH at any time during data output. Any READ DATA BYTES at
HIGHER SPEED command issued while an ERASE, PROGRAM, or WRITE cycle is in
progress is rejected without any effect on the cycle that is in progress.
Figure 14: READ DATA BYTES at HIGHER SPEED Command Sequence
0
7
8
C
x
C
LSB
A[MIN]
DQ0
Command
MSB
A[MAX]
LSB
D
D
D
D
D
D
D
D
D
OUT
DQ1
High-Z
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
MSB
Dummy cycles
Don’t Care
1. Cx = 7 + (A[MAX] + 1).
Note:
PDF: 09005aef8456654f
m25p40.pdf - Rev. Y 8/12 EN
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