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M25P40-VMC6Txx 参数 Datasheet PDF下载

M25P40-VMC6Txx图片预览
型号: M25P40-VMC6Txx
PDF下载: 下载PDF文件 查看货源
内容描述: 美光M25P40串行闪存的嵌入式存储器 [Micron M25P40 Serial Flash Embedded Memory]
分类和应用: 闪存存储
文件页数/大小: 59 页 / 785 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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Micron M25P40 Serial Flash Embedded Memory  
READ DATA BYTES  
READ DATA BYTES  
The device is first selected by driving chip select (S#) LOW. The command code for  
READ DATA BYTES is followed by a 3-byte address (A23-A0), each bit being latched-in  
during the rising edge of serial clock (C). Then the memory contents at that address is  
shifted out on serial data output (DQ1), each bit being shifted out at a maximum fre-  
quency fR during the falling edge of C.  
The first byte addressed can be at any location. The address is automatically incremen-  
ted to the next higher address after each byte of data is shifted out. Therefore, the entire  
memory can be read with a single READ DATA BYTES command. When the highest ad-  
dress is reached, the address counter rolls over to 000000h, allowing the read sequence  
to be continued indefinitely.  
The READ DATA BYTES command is terminated by driving S# HIGH. S# can be driven  
HIGH at any time during data output. Any READ DATA BYTES command issued while  
an ERASE, PROGRAM, or WRITE cycle is in progress is rejected without any effect on  
the cycle that is in progress.  
Figure 13: READ DATA BYTES Command Sequence  
0
7
8
Cx  
C
LSB  
A[MIN]  
DQ[0]  
DQ1  
Command  
High-Z  
MSB  
A[MAX]  
LSB  
DOUT DOUT  
DOUT  
MSB  
DOUT  
DOUT  
DOUT  
DOUT  
DOUT  
DOUT  
Don’t Care  
1. Cx = 7 + (A[MAX] + 1).  
Note:  
PDF: 09005aef8456654f  
m25p40.pdf - Rev. Y 8/12 EN  
Micron Technology, Inc. reserves the right to change products or specifications without notice.  
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© 2011 Micron Technology, Inc. All rights reserved.