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JS28F512P30TF 参数 Datasheet PDF下载

JS28F512P30TF图片预览
型号: JS28F512P30TF
PDF下载: 下载PDF文件 查看货源
内容描述: 美光并行NOR闪存的嵌入式存储器( P30-65nm ) [Micron Parallel NOR Flash Embedded Memory (P30-65nm)]
分类和应用: 闪存存储内存集成电路光电二极管
文件页数/大小: 92 页 / 1225 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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512Mb, 1Gb, 2Gb: P30-65nm  
Status Register  
sequence error occurs during an ERASE SUSPEND, the status register contains the com-  
mand sequence error status (SR[7,5,4] set). When the ERASE operation resumes and fin-  
ishes, possible errors during the operation cannot be detected via the status register be-  
cause it contains the previous error status.  
3. When bits 5:4 indicate a PROGRAM/ERASE operation error, either a CLEAR STATUS REG-  
ISTER 50h) or a RESET command must be issued with a 15µs delay.  
Clear Status Register  
The CLEAR STATUS REGISTER command clears the status register. It functions inde-  
pendently of VPP. The device sets and clears SR[7,6,2], but it sets bits SR[5:3,1] without  
clearing them. The status register should be cleared before starting a command se-  
quence to avoid any ambiguity. A device reset also clears the status register.  
PDF: 09005aef845667b3  
p30_65nm_MLC_512Mb-1gb_2gb.pdf - Rev. B 12/13 EN  
Micron Technology, Inc. reserves the right to change products or specifications without notice.  
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© 2013 Micron Technology, Inc. All rights reserved.