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JS28F256P30TFE 参数 Datasheet PDF下载

JS28F256P30TFE图片预览
型号: JS28F256P30TFE
PDF下载: 下载PDF文件 查看货源
内容描述: 256MB和512MB (256 / 256MB ) , P30-65nm [256Mb and 512Mb (256Mb/256Mb), P30-65nm]
分类和应用:
文件页数/大小: 95 页 / 1351 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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256Mb and 512Mb (256Mb/256Mb), P30-65nm  
Erase Operations  
Erase Operations  
Flash erasing is performed on a block basis. An entire block is erased each time an erase  
command sequence is issued, and only one block is erased at a time. When a block is  
erased, all bits within that block read as logical ones. The following sections describe  
block erase operations in detail.  
Block Erase  
Block erase operations are initiated by writing the Block Erase Setup command to the  
address of the block to be erased. Next, the Block Erase Confirm command is written to  
the address of the block to be erased. If the device is placed in standby (CE# deasserted)  
during an erase operation, the device completes the erase operation before entering  
standby. The VPP value must be above VPPLK and the block must be unlocked.  
During a block erase, the Write State Machine (WSM) executes a sequence of internally-  
timed events that conditions, erases, and verifies all bits within the block. Erasing the  
flash memory array changes “zeros” to “ones”. Memory block array that are ones can be  
changed to zeros only by programming the block.  
The Status Register can be examined for block erase progress and errors by reading any  
address. The device remains in the Read Status Register state until another command is  
written. SR.0 indicates whether the addressed block is erasing. Status Register bit SR.7 is  
set upon erase completion.  
Status Register bit SR.7 indicates block erase status while the sequence executes. When  
the erase operation has finished, Status Register bit SR.5 indicates an erase failure if set.  
SR.3 set would indicate that the WSM could not perform the erase operation because  
VPP was outside of its acceptable limits. SR.1 set indicates that the erase operation at-  
tempted to erase a locked block, causing the operation to abort.  
Before issuing a new command, the Status Register contents should be examined and  
then cleared using the Clear Status Register command. Any valid command can follow  
once the block erase operation has completed.  
The Block Erase operation is aborted by performing a reset or powering down the de-  
vice. In this case, data integrity cannot be ensured, and it is recommended to erase  
again the blocks aborted.  
Blank Check  
The Blank Check operation determines whether a specified main block is blank; that is,  
completely erased. Without Blank Check, Block Erase would be the only other way to  
ensure a block is completely erased. Blank Check is especially useful in the case of erase  
operation interrupted by a power loss event.  
Blank check can apply to only one block at a time, and no operations other than Status  
Register Reads are allowed during Blank Check (e.g. reading array data, program, erase  
etc). Suspend and resume operations are not supported during Blank Check, nor is  
Blank Check supported during any suspended operations.  
Blank Check operations are initiated by writing the Blank Check Setup command to the  
block address. Next, the Check Confirm command is issued along with the same block  
address. When a successful command sequence is entered, the device automatically en-  
ters the Read Status State. The WSM then reads the entire specified block, and deter-  
mines whether any bit in the block is programmed or over-erased.  
PDF: 09005aef84566799  
p30_65nm_256Mb-512mb.pdf - Rev. A 1/13 EN  
Micron Technology, Inc. reserves the right to change products or specifications without notice.  
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© 2013 Micron Technology, Inc. All rights reserved.  
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