P30-65nm SBC
1.3
Figure 1:
Memory Map
P30-65nm SBC Memory Map (64-Mbit and 128-Mbit Densities)
A<23:1> 128- Mbit
A<22:1> 64-Mbit
7F0000 – 7FFFFF
64- Kword Block
130
3F0000 – 3FFFFF
64- Kword Block
66
020000 – 02FFFF
010000 – 01FFFF
00C000– 00FFFF
008000 – 00BFFF
004000 – 007FFF
000000 – 003FFF
64- Kword Block
64- Kword Block
16-
16-
16-
16-
Kword Block
Kword Block
Kword Block
Kword Block
5
4
3
2
1
0
Bottom Boot
Word Wide (x16) Mode
A<23:1> 128- Mbit
7FC000– 7FFFFF
7F8000–7FBFFF
7F4000–7F7000
7F 0000–7F3FFF
7E0000–7EFFFF
16-
16-
16-
16-
Kword Block
Kword Block
Kword Block
Kword Block
130
129
128
127
126
64-Mbit
128- bit
M
A<22:1> 64-Mbit
16-
16-
16-
16-
64- Kword Block
128-Mbit
3FC000– 3FFFFF
3F8000–3FBFFF
3F4000–3F7FFF
3F0000–3F3FFF
3E0000–3EFFFF
Kword Block
Kword Block
Kword Block
Kword Block
66
65
64
63
62
64- Kword Block
010000–01FFFF
000000–00FFFF
64- Kword Block
64- Kword Block
1
0
010000–01FFFF
000000–00FFFF
64- Kword Block
64- Kword Block
1
0
Top Boot
Word Wide (x16) Mode
Top Boot
Word Wide (x16) Mode
Note:
A1 is the least significant address bit for TSOP and Easy BGA while A0 for the QUAD+
package. Unless otherwise indicated, for the purpose of brevity, this document will
consolidate all discussions to A1 as the least significant Address bit.
Datasheet
6
Apr 2010
Order Number: 208033-02
64-Mbit
MICRON [ MICRON TECHNOLOGY ]
