32Mb, 64Mb, 128Mb: 3V Embedded Parallel NOR Flash
Standard Command Definitions – Address-Data Cycles
Standard Command Definitions – Address-Data Cycles
Table 17: Standard Command Definitions – Address-Data Cycles, 8-Bit and 16-Bit
Note 1 applies to entire table
Address and Data Cycles
1st
2nd
3rd
4th
5th
6th
Command and
Code/Subcode
Bus
Size
A
D
A
D
A
D
A
D
A
D
A
D
Notes
READ and AUTO SELECT Operations
READ/RESET (F0h)
x8
X
F0
AAA AA
555
55
55
X
X
F0
F0
x16
X
F0
555
AA
55
AA 2AA
98
READ CFI (98h)
x8
x16
x8
AUTO SELECT (90h)
AAA AA
555
555
55
AAA
555
90 Note Note
2, 3, 4
2
2
x16
2AA
BYPASS Operations
UNLOCK BYPASS (20h)
x8
x16
x8
AAA AA
555
555
2AA
X
55
00
AAA
555
20
UNLOCK BYPASS
RESET (90h/00h)
X
90
x16
PROGRAM Operations
PROGRAM (A0h)
x8
x16
x8
AAA AA
555
555
2AA
PA
55
PD
PD
PD
AAA A0
555
PA
PD
UNLOCK BYPASS
PROGRAM (A0h)
X
A0
50
56
6
x16
x8
DOUBLE BYTE/WORD
PROGRAM (50h)
AAA
555
PA2
PA4
PA8
x16
x8
QUADRUPLE BYTE/
WORD PROGRAM (56h)
AAA
555
x16
x8
OCTUPLE BYTE PRO-
GRAM (8Bh)
AAA 8B
PD
55
5
WRITE TO BUFFER
PROGRAM (25h)
x8
AAA AA
555
555
BAd
BAd
25
33
BAd
PA
N
PA
PD
7, 8, 9
x16
x16
2AA
ENHANCED WRITE
TO BUFFER
PROGRAM (33h)
555
AA 2AA
55
N
PD
7, 9, 10
5
UNLOCK BYPASS
WRITE TO BUFFER
PROGRAM (25h)
x8
BAd
25
BAd
PA
PD
x16
PDF: 09005aef84dc44a7
m29ew_32Mb-128Mb.pdf - Rev. B 11/12 EN
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