32Mb, 64Mb, 128Mb: 3V Embedded Parallel NOR Flash
Program Operations
ue to output the status register. A READ/RESET command must be issued to reset the
error condition and return the device to read mode.
The PROGRAM command cannot change a bit set to 0 back to 1, and an attempt to do
so is masked during a PROGRAM operation. Instead, an ERASE command must be used
to set all bits in one memory block or in the entire memory from 0 to 1.
The PROGRAM operation is aborted by performing a reset or by powering-down the de-
vice. In this case, data integrity cannot be ensured, and it is recommended that the
words or bytes that were aborted be reprogrammed.
UNLOCK BYPASS PROGRAM Command
When the device is in unlock bypass mode, the UNLOCK BYPASS PROGRAM (A0h)
command can be used to program one address in the memory array. The command re-
quires two bus WRITE operations instead of four required by a standard PROGRAM
command; the final WRITE operation latches the address and data and starts the pro-
gram/erase controller (The standard PROGRAM command requires four bus WRITE op-
erations). The PROGRAM operation using the UNLOCK BYPASS PROGRAM command
behaves identically to the PROGRAM operation using the PROGRAM command. The
operation cannot be aborted. A bus READ operation to the memory outputs the status
register.
DOUBLE BYTE/WORD PROGRAM Command
The DOUBLE BYTE/WORD PROGRAM (50h) command is used to write a page of two
adjacent bytes/words in parallel. The two bytes/words must differ only for the address
A-1 or A0, respectively. Three bus write cycles are necessary to issue the command: The
first bus cycle sets up the command, the second bus cycle latches the address and data
of the first byte/word to be programmed, and the third bus cycle latches the address
and data of the second byte/word to be programmed and starts the program/erase con-
troller.
Note: The DOUBLE BYTE/WORD PROGRAM command is available only in the 32Mb
and 64Mb devices; also only VPPL is to be applied to the VPP/WP# pin.
QUADRUPLE BYTE/WORD PROGRAM Command
The QUADRUPLE BYTE/WORD PROGRAM (56h) command is used to write a page of
four adjacent bytes/words in parallel. The four bytes/words must differ for addresses
A0, DQ15/A-1 in x8 mode or for addresses A1, A0 in x16 mode. Five bus write cycles are
necessary to issue the command: The first bus cycle sets up the command, the second
bus cycle latches the address and data of the first byte/word to be programmed, the
third bus cycle latches the address and data of the second byte/word to be program-
med, the fourth bus cycle latches the address and data of the third byte/word to be pro-
grammed, and the fifth bus cycle latches the address and data of the fourth byte/word
to be programmed and starts the program/erase controller.
Note: The QUADRUPLE BYTE/WORD PROGRAM command is available only in the
32Mb and 64Mb devices; also only VPPL is to be applied to the VPP/WP# pin.
PDF: 09005aef84dc44a7
m29ew_32Mb-128Mb.pdf - Rev. B 11/12 EN
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