32Mb, 64Mb, 128Mb: 3V Embedded Parallel NOR Flash
Memory Organization
Table 4: Signal Descriptions (Continued)
Name
Type
Description
RY/BY#
Output Ready busy: Open-drain output that can be used to identify when the device is performing
a PROGRAM or ERASE operation. During PROGRAM or ERASE operations, RY/BY# is LOW,
and is High-Z during read mode, auto select mode, and erase suspend mode. After a hard-
ware reset, READ and WRITE operations cannot begin until RY/BY# goes High-Z (see RESET
AC Specifications for more details).
The use of an open-drain output enables the RY/BY# pins from several devices to be connec-
ted to a single pull-up resistor to VCCQ. A low value will then indicate that one (or more) of
the devices is (are) busy. A 10K Ohm or bigger resistor is recommended as pull-up resistor to
achieve 0.1V VOL
.
VCC
Supply
Supply voltage: Provides the power supply for READ, PROGRAM, and ERASE operations.
The command interface is disabled when VCC <= VLKO. This prevents WRITE operations from
accidentally damaging the data during power-up, power-down, and power surges. If the pro-
gram/erase controller is programming or erasing during this time, then the operation aborts
and the contents being altered will be invalid.
A 0.1μF capacitor should be connected between VCC and VSS to decouple the current surges
from the power supply. The PCB track widths must be sufficient to carry the currents required
during PROGRAM and ERASE operations (see DC Characteristics).
VCCQ
Supply
I/O supply voltage: Provides the power supply to the I/O pins and enables all outputs to be
powered independently from VCC
.
VSS
Supply
–
Ground: All VSS pins must be connected to the system ground.
Reserved for future use: RFUs should be not connected.
RFU
Memory Organization
Memory Configuration
The 32Mb device memory array (x8/x16) is divided into 63 main blocks (64KB each) and
8 top or bottom boot blocks (8KB each). It is also divided into 64 main uniform blocks
(64KB each).
The 64Mb device memory array (x8/x16) is divided into 127 main blocks (64KB each)
and 8 top or bottom boot blocks (8KB each). It is also divided into 128 main uniform
blocks (64KB each).
The 128Mb device memory array (x8/x16) is divided into 128 main uniform blocks
(128KB each).
PDF: 09005aef84dc44a7
m29ew_32Mb-128Mb.pdf - Rev. B 11/12 EN
Micron Technology, Inc. reserves the right to change products or specifications without notice.
14
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