512Mb, 1Gb, 2Gb: P33-65nm
Virtual Chip Enable Description
Virtual Chip Enable Description
The 2Gb device employs a virtual chip enable feature, which combines two 1Gb die
with a common chip enable, CE# for Easy BGA packages. The maximum address bit is
then used to select between the die pair with CE# asserted. When CE# is asserted and
the maximum address bit is LOW, the lower parameter die is selected; when CE# is as-
serted and the maximum address bit is HIGH, the upper parameter die is selected.
Table 3: Virtual Chip Enable Truth Table for Easy BGA Packages
Die Selected
CE#
A[MAX]
Lower parameter die
Upper parameter die
L
L
L
H
Figure 1: Easy BGA Block Diagram
Easy BGA (Dual Die) Top/Bottom
Parameter Configuration
Top Parameter Die
CE#
WP#
OE#
RST#
V
CC
V
WE#
CLK
PP
V
CCQ
Bottom Parameter Die
V
ADV#
SS
DQ[15:0]
WAIT
A[MAX:1]
PDF: 09005aef845667b8
p33_65nm_MLC_512Mb-1gb_2gb.pdf - Rev. C 12/13 EN
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