512Mb, 1Gb, 2Gb: P33-65nm
Flowcharts
Figure 16: Buffered Enhanced Factory Programming (BEFP) Procedure
Setup Phase
Program and Verify Phase
Exit Phase
Read status
register
Read status
register
Start
Issue BEFP SETUP
Data = 0x80
Buffer ready?
BEFP exited?
No (SR0 = 1)
No (SR7 = 0)
Yes (SR7 = 1)
Yes (SR0 = 0)
Issue BEFP CONFIRM
Data = 00D0h
Full status
register check
for errors
Write data
word to buffer
BEFP setup
delay
No
Buffer full?
Yes
Finish
Read status
register
Read status
register
Yes (SR7 = 0)
BEFP setup
done?
No (SR0 = 1)
Program
done?
No (SR7 = 1)
SR error-handler
user-defined
Yes (SR0 = 0)
Yes
Program
more data
Exit
?
No
Write 0xFFFF
outside block
PDF: 09005aef845667b8
p33_65nm_MLC_512Mb-1gb_2gb.pdf - Rev. C 12/13 EN
Micron Technology, Inc. reserves the right to change products or specifications without notice.
64
© 2013 Micron Technology, Inc. All rights reserved.
MICRON [ MICRON TECHNOLOGY ]
