256Mb, 512Mb, 1Gb, 2Gb: 3V Embedded Parallel NOR Flash
Block Protection Command Definitions – Address-Data Cycles
9. For the x8 READ PASSWORD command, the nth (and final) address cycle equals the 8th
address cycle. From the 5th to the 8th address cycle, the values for each address and da-
ta pair continue the pattern shown in the table as follows: for x8, address and data = 04
and PWD4; 05 and PWD5; 06 and PWD6; 07 and PWD7.
10. For the x8 UNLOCK PASSWORD command, the nth (and final) address cycle equals the
11th address cycle. From the 5th to the 10th address cycle, the values for each address
and data pair continue the pattern shown in the table as follows: address and data = 02
and PWD2; 03 and PWD3; 04 and PWD4; 05 and PWD5; 06 and PWD6; 07 and PWD7.
For the x16 UNLOCK PASSWORD command, the nth (and final) address cycle equals the
7th address cycle. For the 5th and 6th address cycles, the values for the address and data
pair continue the pattern shown in the table as follows: address and data = 02 and
PWD2; 03 and PWD3.
11. Both nonvolatile and volatile protection bit settings are as follows: Protected state = 00;
Unprotected state= 01.
12. The CLEAR ALL NONVOLATILE PROTECTION BITS command programs all nonvolatile pro-
tection bits before erasure. This prevents over-erasure of previously cleared nonvolatile
protection bits.
PDF: 09005aef849b4b09
m29ew_256mb_2gb.pdf - Rev. B 8/12 EN
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