32Mb, 64Mb, 128Mb: 3V Embedded Parallel NOR Flash
Write AC Characteristics
Figure 24: WE#-Controlled Program AC Timing (16-Bit Mode)
3rd Cycle 4th Cycle
Data Polling
READ Cycle
t
t
WC
WC
555h
t
PA
PA
A[MAX:0]
CE#
t
AS
AH
t
t
CH
t
E
CS
t
t
GHWL
OE
OE#
t
t
WP
WPH
WE#
t
t
tWHWH1
DF
OH
t
DS
DQ[15:0]
Notes:
AOh
DH
PD
DQ7#
D
D
OUT
OUT
t
1. Only the third and fourth cycles of the PROGRAM command are represented. The PRO-
GRAM command is followed by checking of the status register data polling bit and by a
READ operation that outputs the data (DOUT) programmed by the previous PROGRAM
command.
2. PA is the address of the memory location to be programmed. PD is the data to be pro-
grammed.
3. DQ7 is the complement of the data bit being programmed to DQ7 (See Data Polling Bit
[DQ7]).
4. See the following tables for timing details: Read AC Characteristics, WE#-Controlled
Write AC Characteristics, and CE#-Controlled Write AC Characteristics.
PDF: 09005aef84dc44a7
m29ew_32Mb-128Mb.pdf - Rev. B 11/12 EN
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