32Mb, 64Mb, 128Mb: 3V Embedded Parallel NOR Flash
Program Operations
If an address is written several times during a WRITE TO BUFFER PROGRAM operation,
the address/data counter will be decremented at each data load operation, and the data
will be programmed to the last word loaded into the buffer.
Invalid address combinations or the incorrect sequence of bus WRITE cycles will abort
the WRITE TO BUFFER PROGRAM command.
The status register bits DQ1, DQ5, DQ6, DQ7 can be used to monitor the device status
during a WRITE TO BUFFER PROGRAM operation.
The WRITE TO BUFFER PROGRAM command should not be used to change a bit set to
0 back to 1, and an attempt to do so is masked during the operation. Rather than the
WRITE TO BUFFER PROGRAM command, the ERASE command should be used to set
memory bits from 0 to 1.
Figure 10: Boundary Condition of Program Buffer Size
0000h
255 words
or less are
allowed
in the
program
buffer
256-word
program
buffer is
allowed
256 Words
Any
buffer
program
attempt
is not
0100h
allowed
256-word
program
256 Words
buffer is
allowed
0200h
PDF: 09005aef84dc44a7
m29ew_32Mb-128Mb.pdf - Rev. B 11/12 EN
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