32Mb, 64Mb, 128Mb: 3V Embedded Parallel NOR Flash
Program Operations
OCTUPLE BYTE PROGRAM Command
The OCTUPLE BYTE PROGRAM (8Bh) command is used to write a page of eight adja-
cent bytes in parallel. The eight bytes must differ for addresses A1, A0, DQ15/A-1 in x8
mode only.
Nine bus write cycles are necessary to issue the command: The first bus cycle sets up
the command, the second bus cycle latches the address and data of the first byte to be
programmed, the third bus cycle latches the address and data of the second byte to be
programmed, the fourth bus cycle latches the address and data of the third byte to be
programmed, the fifth bus cycle latches the address and data of the fourth byte to be
programmed, the sixth bus cycle latches the address and data of the fifth byte to be pro-
grammed, the seventh bus cycle latches the address and data of the sixth byte to be pro-
grammed, the eighth bus cycle latches the address and data of the seventh byte to be
programmed, and the ninth bus cycle latches the address and data of the eighth byte to
be programmed, and starts the program/erase controller.
Note: The OCTUPLE BYTE PROGRAM command is available only in the 32Mb and
64Mb x8 devices; also only VPPL is to be applied to the VPP/WP# pin.
WRITE TO BUFFER PROGRAM Command
The WRITE TO BUFFER PROGRAM (25h) command makes use of the program buffer to
speed up programming and dramatically reduces system programming time compared
to the standard non-buffered PROGRAM command. 32Mb through 128Mb devices sup-
port a 256-word maximum program buffer.
When issuing a WRITE TO BUFFER PROGRAM command, V PP/WP# can be held HIGH
or raised to VPPH. Also, it can be held LOW if the block is not the lowest or highest block
or the top/bottom two blocks, depending on the part number. When VPPH is applied to
the VPP/WP# pin during execution of the command, programming speed increases (see
the Accelerated Program, Data Polling/Toggle AC Characteristics section).
The following successive steps are required to issue the WRITE TO BUFFER PROGRAM
command:
First, two UNLOCK cycles are issued. Next, a third bus WRITE cycle sets up the WRITE
TO BUFFER PROGRAM command. The set-up code can be addressed to any location
within the targeted block. Then, a fourth bus WRITE cycle sets up the number of words/
bytes to be programmed. Value n is written to the same block address, where n + 1 is the
number of words/bytes to be programmed. Value n + 1 must not exceed the size of the
program buffer, or the operation will abort. A fifth cycle loads the first address and data
to be programmed. Last, n bus WRITE cycles load the address and data for each word/
byte into the program buffer. Addresses must lie within the range from the start address
+1 to the start address + (n - 1).
Optimum programming performance and lower power usage are achieved by aligning
the starting address at the beginning of a 256-word boundary (A[7:0] = 0x000h). Any
buffer size smaller than 256 words is allowed within a 256-word boundary, while all ad-
dresses used in the operation must lie within the 256-word boundary. In addition, any
crossing boundary buffer program will result in a program abort. For a x8 device, maxi-
mum buffer size is 256 bytes; for a x16 device, the maximum buffer size is 512 bytes.
To program the content of the program buffer, this command must be followed by a
WRITE TO BUFFER PROGRAM CONFIRM command.
PDF: 09005aef84dc44a7
m29ew_32Mb-128Mb.pdf - Rev. B 11/12 EN
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