TCN75
1
9
1
9
1
9
1
0
0
1
A2 A1 A0 R/W
D7 D6 D5 D4 D3 D2 D1 D0
Most Significant Data Byte
D7 D6 D5 D4 D3 D2 D1 D0
Least Significant Data Byte
Stop
Cond
by
Start
by
Ack
by
Ack
by
No Ack
by
Address Byte
Master
Master
Master
Master
TCN75
(a) Typical 2-Byte Read From Preset Pointer Location Such as Temp, T , T
OS HYST
1
9
1
9
. . . . .
. . . . .
1
0
0
1
A2 A1 A0 R/W
0
0
0
0
0
0 D1 D0
Start
by
Master
Ack
by
Ack
by
Address Byte
1
Pointer Byte
TCN75
TCN75
9
1
9
1
9
1
0
0
1
A2 A1 A0 R/W
D7 D6 D5 D4 D3 D2 D1 D0
Most Significant Data Byte
D7 D6 D5 D4 D3 D2 D1 D0
Least Significant Data Byte
Stop
Cond
by
Repeat
Start
Ack
by
Ack
by
No Ack
by
Address Byte
by
Master
Master
Master
Master
TCN75
(b) Typical Pointer Set Followed by Immediate Read for 2-Byte Register Such as Temp, T , T
OS HYST
1
9
1
9
1
0
0
1
A2 A1 A0 R/W
D7 D6 D5 D4 D3 D2 D1 D0
Data Byte
Stop
Cond
by
Start
by
Ack
by
No Ack
by
Address Byte
Master
Master
Master
TCN75T
(c) Typical 1-Byte Read From Configuration Register with Preset Pointer
FIGURE 5-1:
Timing Diagrams
DS21490C-page 12
© 2006 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
