TC646
2.0
PIN DESCRIPTIONS
2.3
Analog Input (V
AS
)
The descriptions of the pins are listed in Table 2-1.
An external resistor divider connected to the V
AS
input
sets the auto-shutdown threshold. Auto-shutdown
occurs when V
IN
≤
V
AS
. The fan is automatically
restarted when V
IN
≥
(V
AS
+ V
HAS
“Typical Applications”, for more details).
TABLE 2-1:
Pin No.
1
2
3
4
5
6
7
8
V
IN
C
F
V
AS
PIN FUNCTION TABLE
Description
Analog Input
Analog Output
Analog Input
Ground Terminal
Analog Input
Digital (Open Collector) Output
Digital Output
Power Supply Input
Symbol
2.4
Ground (GND)
GND denotes the ground terminal.
GND
SENSE
FAULT
V
OUT
V
DD
2.5
Analog Input (SENSE)
Pulses are detected at the SENSE pin as fan rotation
chops the current through a sense resistor (R
SENSE
).
The absence of pulses indicates a fault (see
Section 5.0, “Typical Applications”, for more details).
2.1
Analog Input (V
IN
)
2.6
Digital Output (FAULT)
The thermistor network (or other temperature sensor)
connects to the V
IN
input. A voltage range of 1.25V to
2.65V (typical) on this pin drives an active duty cycle of
0% to 100% on the V
OUT
pin. The TC646 enters shut-
down mode when V
IN
≤
V
SHDN
. During shutdown, the
FAULT output is inactive, and supply current falls to
25 µA (typical). The TC646 exits shutdown mode
when V
IN
≥
V
REL
(see Section 5.0, “Typical
Applications”, for details).
2.2
Analog Output (C
F
)
The FAULT line goes low to indicate a fault condition.
When FAULT goes low due to a fan fault condition, the
device is latched in shutdown mode until deliberately
cleared or until power is cycled. FAULT will also be
asserted when the PWM reaches 100% duty cycle,
indicating that maximum cooling capability has been
reached and a possible over-temperature condition
may occur. This is a non-latching state and the FAULT
output will go high when the PWM duty cycle goes
below 100%.
C
F
is the positive terminal for the PWM ramp generator
timing capacitor. The recommended C
F
is 1 µF for
30 Hz PWM operation.
2.7
Digital Output (V
OUT
)
V
OUT
is an active high complimentary output that drives
the base of an external NPN transistor (via an appropri-
ate base resistor) or the gate of an N-channel MOS-
FET. This output has asymmetrical drive (see
2.8
Power Supply Input (V
DD
)
V
DD
may be independent of the fan’s power supply
(see Section 1.0, “Electrical Characteristics”).
2002 Microchip Technology Inc.
DS21446C-page 5
MICROCHIP [ MICROCHIP TECHNOLOGY ]
