TC1426/TC1427/TC1428
3.0
3.1
APPLICATIONS INFORMATION
SUPPLY BYPASSING
3.3
INPUT STAGE
Large currents are required to charge and discharge
capacitive loads quickly. For example, charging a
1000pF load to 16V in 25nsec requires a 0.8A current
from the device’s power supply.
To guarantee low supply impedance over a wide
frequency range, a parallel capacitor combination is
recommended for supply bypassing. Low-inductance
ceramic MLC capacitors with short lead lengths
(<0.5-in.) should be used. A 1.0µF film capacitor in
parallel with one or two 0.1µF ceramic MLC capacitors
normally provides adequate bypassing.
The input voltage level changes the no-load or
quiescent supply current. The N-channel MOSFET
input stage transistor drives a 2.5mA current source
load. With a logic "1" input, the maximum quiescent
supply current is 9mA. Logic "0" input level signals
reduce quiescent current to 500µA maximum.
Unused
driver inputs must be connected to V
DD
or GND.
Minimum power dissipation occurs for logic "0" inputs
for the TC1426/TC1427/TC1428.
The drivers are designed with 100mV of hysteresis.
This provides clean transitions and minimizes output
stage current spiking when changing states. Input
voltage thresholds are approximately 1.5V, making a
logic "1" input any voltage greater than 1.5V up to V
DD
.
Input current is less than 1µA over this range.
The TC1426/TC1427/TC1428 may be directly driven
by the TL494, SG1526/27, TC38C42, TC170 and
similar switch-mode power supply integrated circuits.
3.2
GROUNDING
The TC1426 and TC1428 contain inverting drivers.
Individual ground returns for the input and output
circuits or a ground plane should be used. This will
reduce negative feedback that causes degradation in
switching speed characteristics.
FIGURE 3-1:
INVERTING DRIVER
SWITCHING TIME
V
DD
= 16V
FIGURE 3-2:
NONINVERTING DRIVER
SWITCHING TIME
V
DD
= 16V
Test Circuit
Test Circuit
1µF
MKS-2
Input
1
0.1µF MLC
1µF
WIMA
MKS-2
Input
1
0.1µF MLC
Output
C
L
= 1000pF
Output
C
L
= 1000pF
2
2
TC1426
(1/2 TC1428)
TC1427
(1/2 TC1428)
+5V
Input
0V
V
DD
Output
0V
10%
10%
t
D1
90%
t
F
90%
+5V
Input
0V
10%
90%
t
R
10%
90%
t
D2
t
R
90%
V
DD
Output
0V
t
D1
t
D2
90%
t
F
10%
10%
DS21393B-page 6
2002 Microchip Technology Inc.
MICROCHIP [ MICROCHIP TECHNOLOGY ]
