Charge Pump DC-TO-DC Voltage Converter
TC1044S
V+
1
2
+
10µF
3
4
"1"
8
7
TC1044S
6
5
+
10µF
1
2
3
4
"n"
8
TC1044S
7
6
5
+
VOUT
*
10µF
*
NOTES:
1. V
OUT
= –n(V
+
) for 1.5V
≤
V
+
≤
12V
+
10µF
Figure 5. Increased Output Voltage by Cascading Devices
Cascading Devices
The TC1044S may be cascaded as shown (Figure 5) to
produce larger negative multiplication of the initial supply
voltage. However, due to the finite efficiency of each device,
the practical limit is 10 devices for light loads. The output
voltage is defined by:
V
OUT
= –n(V
IN
)
where n is an integer representing the number of devices
cascaded. The resulting output resistance would be ap-
proximately the weighted sum of the individual TC1044S
R
OUT
values.
Changing the TC1044S Oscillator Frequency
It may be desirable in some applications (due to noise or
other considerations) to increase the oscillator frequency.
Pin 1, frequency boost pin may be connected to V
+
to
increase oscillator frequency to 45kHz from a nominal of
10kHz for an input supply voltage of 5.0 volts. The oscillator
may also be synchronized to an external clock as shown in
Figure 6. In order to prevent possible device latch-up, a 1kΩ
resistor must be used in series with the clock output. In a
V+
1
2
+
10µF
8
1kΩ
7
V+
CMOS
GATE
situation where the designer has generated the external
clock frequency using TTL logic, the addition of a 10kΩ pull-
up resistor to V
+
supply is required. Note that the pump
frequency with external clocking, as with internal clocking,
will be 1/2 of the clock frequency. Output transitions occur on
the positive-going edge of the clock.
It is also possible to increase the conversion efficiency
of the TC1044S at low load levels by lowering the oscillator
frequency. This reduces the switching losses, and is achieved
by connecting an additional capacitor, C
OSC
, as shown in
Figure 7. Lowering the oscillator frequency will cause an
undesirable increase in the impedance of the pump (C
1
) and
the reservoir (C
2
) capacitors. To overcome this, increase the
values of C
1
and C
2
by the same factor that the frequency
has been reduced. For example, the addition of a 100pF
capacitor between pin 7 (OSC) and pin 8 (V
+
) will lower the
oscillator frequency to 1kHz from its nominal frequency of
10kHz (a multiple of 10), and necessitate a corresponding
increase in the values of C
1
and C
2
(from 10µF to 100µF).
Positive Voltage Multiplication
The TC1044S may be employed to achieve positive
voltage multiplication using the circuit shown in Figure 8. In
this application, the pump inverter switches of the TC1044S
are used to charge C
1
to a voltage level of V
+
– V
F
(where V
+
is the supply voltage and V
F
is the forward voltage drop of
diode D
1
). On the transfer cycle, the voltage on C
1
plus the
supply voltage (V
+
) is applied through diode D
2
to capacitor
C
2
. The voltage thus created on C
2
becomes (2V
+
) – (2V
F
),
or twice the supply voltage minus the combined forward
voltage drops of diodes D
1
and D
2
.
The source impedance of the output (V
OUT
) will depend
on the output current, but for V
+
= 5V and an output current
of 10mA, it will be approximately 60Ω.
TC1044S
3
4
6
5
+
10µF
VOUT
Figure 6. External Clocking
© 2001 Microchip Technology Inc.
DS21348A
5
TC1044S-12 9/16/96
MICROCHIP [ MICROCHIP TECHNOLOGY ]
