PIC32MX1XX/2XX
This document contains device-specific information for
PIC32MX1XX/2XX devices.
1.0
DEVICE OVERVIEW
Note 1: This data sheet summarizes the features
of the PIC32MX1XX/2XX family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to the related section of the
“PIC32 Family Reference Manual”, which
is available from the Microchip web site
(www.microchip.com/PIC32).
Figure 1-1 illustrates a general block diagram of the
core and peripheral modules in the PIC32MX1XX/2XX
family of devices.
Table 1-1 lists the functions of the various pins shown
in the pinout diagrams.
2: Some registers and associated bits
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization” in
this data sheet for device-specific register
and bit information.
(1)
FIGURE 1-1:
BLOCK DIAGRAM
VCAP
OSC2/CLKO
OSC1/CLKI
OSC/SOSC
Oscillators
Power-up
VDD, VSS
Timer
FRC/LPRC
Oscillators
MCLR
Voltage
Oscillator
Start-up Timer
Regulator
PLL
Power-on
Reset
Precision
Band Gap
Reference
Dividers
PLL-USB
Watchdog
Timer
USBCLK
SYSCLK
PBCLK
Brown-out
Reset
Timing
Generation
Peripheral Bus Clocked by SYSCLK
CTMU
PORTA
Timer1-5
Priority
JTAG
BSCAN
Interrupt
Controller
PWM
OC1-5
PORTB
PORTC
32
EJTAG
INT
®
®
IC1-5
SPI1-2
I2C1-2
MIPS32 M4K
CPU Core
IS
DS
32
32
32
32
32
32
32
Remappable
Pins
Bus Matrix
32
128
32
Peripheral Bridge
Data RAM
PMP
10-bit ADC
UART1-2
128-bit Wide
Program Flash Memory
RTCC
Comparators 1-3
Note 1: Some features are not available on all device variants. Refer to the family features tables (Table 1 and Table 2) for availability.
© 2011-2012 Microchip Technology Inc.
Preliminary
DS61168D-page 19
MICROCHIP [ MICROCHIP ]
