PIC32MX1XX/2XX
REGISTER 11-1:
Bit
Range
31:24
23:16
15:8
7:0
Bit
31/23/15/7
U-0
[pin
name]R:
PERIPHERAL PIN SELECT INPUT REGISTER
(1)
Bit
30/22/14/6
U-0
Bit
29/21/13/5
U-0
Bit
Bit
28/20/12/4 27/19/11/3
U-0
U-0
Bit
26/18/10/2
U-0
Bit
25/17/9/1
U-0
Bit
24/16/8/0
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
R/W-0
—
R/W-0
—
R/W-0
—
R/W-0
—
—
—
—
[pin
name]R<3:0>
Legend:
R = Readable bit
-n = Value at POR
bit 31-4
bit 3-0
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
Unimplemented:
Read as ‘0’
[pin
name]R<3:0>:
Peripheral Pin Select Input bits
Where [pin
name]
refers to the pins that are used to configure peripheral input mapping. See
for
input pin selection values.
Register values can only be changed if the IOLOCK Configuration bit (CFGCON<13>) =
0.
Note 1:
REGISTER 11-2:
Bit
Range
31:24
23:16
15:8
7:0
Bit
31/23/15/7
U-0
RPnR: PERIPHERAL PIN SELECT OUTPUT REGISTER
(1)
Bit
30/22/14/6
U-0
Bit
29/21/13/5
U-0
Bit
Bit
28/20/12/4 27/19/11/3
U-0
U-0
Bit
26/18/10/2
U-0
Bit
25/17/9/1
U-0
Bit
24/16/8/0
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
R/W-0
—
R/W-0
—
R/W-0
—
R/W-0
—
—
—
—
RPnR<3:0>
Legend:
R = Readable bit
-n = Value at POR
bit 31-4
bit 3-0
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
Unimplemented:
Read as ‘0’
RPnR<3:0>:
Peripheral Pin Select Output bits
See
for output pin selection values.
Register values can only be changed if the IOLOCK Configuration bit (CFGCON<13>) =
0.
Note 1:
©
2011-2012 Microchip Technology Inc.
Preliminary
DS61168D-page 149
MICROCHIP [ MICROCHIP TECHNOLOGY ]
