PIC18F45J10 FAMILY
REGISTER 7-1:
EECON1: EEPROM CONTROL REGISTER 1
U-0
—
U-0
—
U-0
—
R/W-0
FREE
R/W-x
R/W-0
WREN
R/S-0
WR
U-0
—
WRERR
bit 7
bit 0
Legend:
U = Unimplemented bit, read as ‘0’
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
S = Settable bit (cannot be cleared in software)
‘0’ = Bit is cleared x = Bit is unknown
bit 7-5
bit 4
Unimplemented: Read as ‘0’
FREE: Flash Row Erase Enable bit
1= Performs an erase operation on the next WR command (cleared by completion of erase operation)
0= Perform write only
bit 3
WRERR: Flash Program Error Flag bit
1= A write operation is prematurely terminated (any Reset during self-timed programming in normal
operation, or an improper write attempt)
0= The write operation completed
bit 2
bit 1
WREN: Flash Program Write Enable bit
1= Allows write cycles to Flash program
0= Inhibits write cycles to Flash program
WR: Write Control bit
1= Initiates a program memory erase cycle or write cycle.
(The operation is self-timed and the bit is cleared by hardware once write is complete. The WR bit
can only be set (not cleared) in software.)
0= Write cycle is complete
bit 0
Unimplemented: Read as ‘0’
© 2009 Microchip Technology Inc.
DS39682E-page 73