PIC18F45J10 FAMILY
FIGURE 17-1:
AUTOMATIC BAUD RATE CALCULATION
BRG Value
RX pin
XXXXh
0000h
001Ch
Edge #5
Stop Bit
Edge #2
Bit 3
Edge #3
Bit 5
Edge #4
Bit 7
Bit 6
Edge #1
Bit 1
Start
Bit 0
Bit 2
Bit 4
BRG Clock
Auto-Cleared
Set by User
ABDEN bit
RCIF bit
(Interrupt)
Read
RCREG
XXXXh
XXXXh
1Ch
00h
SPBRG
SPBRGH
Note: The ABD sequence requires the EUSART module to be configured in Asynchronous mode and WUE = 0.
FIGURE 17-2:
BRG OVERFLOW SEQUENCE
BRG Clock
ABDEN bit
RX pin
Start
Bit 0
ABDOVF bit
BRG Value
FFFFh
XXXXh
0000h
0000h
DS39682E-page 202
© 2009 Microchip Technology Inc.